Received: by 2002:a6b:500f:0:0:0:0:0 with SMTP id e15csp2294396iob; Sun, 15 May 2022 14:02:52 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyuEscpTT77tGknDa3OxtYSdSCHTZsrW7a7IYLi+OHf5PyhtMpkvP+EFTNlwYZmNB1cGPNp X-Received: by 2002:a5d:5281:0:b0:20c:d5be:331c with SMTP id c1-20020a5d5281000000b0020cd5be331cmr11453934wrv.9.1652648572200; Sun, 15 May 2022 14:02:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1652648572; cv=none; d=google.com; s=arc-20160816; b=yL6T5xNt7vfAfQFyF60EescXNw6oIsGsmVGfD5boTeAMO/gS6E3ZKcsaG4hhmTlOIB MG48sdjiEDVy1lPQd3+XyO+xplfa6X1HYGS9Aw50WGaEPZETcqPDTdUXPd7et4NJJ7Mx rT5wxYmxwxOEXv7PtnNDe+/jLQO/dBX/SGsHPkiwuCDO3xVLNtcXjizBnlQ+9iCroTc2 xV42Ax6e+heMDBHPQuTENKkDJ4z+r0MVtfd3qIbZHj/PEvSjHGzN1WJvIJ24lE15brfb G+BJcfTmdprF+1z1J3TcAMJdqmDMAyb1YH1y4Ymp8klLJRxTHYiG1E6otgIkk898/+Ao PaKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=YB+pgLZMis3HgD8JruMd9mkgYK7uzG/83ULTn5cuLB0=; b=s2PtDiMUaTMvONLUWySHnv4pgNhmB+REW58csRiiHrtCkZlKHZAg2fIRK/SSlstbMe a1QEfl+I0eOpD4B+sct+kRCA96+YVMRsS3oYUg9jQi0TYFhevLE4lP+f3fTKyDu+fSKY bjNuVM9HKqJNZzyPiT3CpU97/hwIQcM+L3dGW95+spcgrSvtfAFVqxdPdHCemwAWss53 9REmjT8hq2HaQVP6/vKg1ut8muTgA0Bo3DC3BUuk0K82FncitAUbkPVVCptRYZx9V2d6 Nkus98X63u7EPjcvOZnJCnqAsVsYtGRm+9RwyFMv3NGS8Z3o3TJKQE9HNLGR79rFIrNC 8+sg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h13-20020adf9ccd000000b0020d012684c8si4254465wre.463.2022.05.15.14.02.26; Sun, 15 May 2022 14:02:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237140AbiEOTsA (ORCPT + 99 others); Sun, 15 May 2022 15:48:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46218 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232042AbiEOTrz (ORCPT ); Sun, 15 May 2022 15:47:55 -0400 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 95E192FFD9; Sun, 15 May 2022 12:47:54 -0700 (PDT) Received: from ip5b412258.dynamic.kabel-deutschland.de ([91.65.34.88] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1nqKDW-00064B-3l; Sun, 15 May 2022 21:47:50 +0200 From: Heiko Stuebner To: Peter Geis , linux-rockchip@lists.infradead.org, Philipp Zabel Cc: Heiko Stuebner , linux-arm-kernel@lists.infradead.org, Marc Zyngier , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: (subset) [PATCH v9 0/5] Enable rk356x PCIe controller Date: Sun, 15 May 2022 21:47:48 +0200 Message-Id: <165264375744.2524444.12267282718534665195.b4-ty@sntech.de> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220429123832.2376381-1-pgwipeout@gmail.com> References: <20220429123832.2376381-1-pgwipeout@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_NONE, T_SCC_BODY_TEXT_LINE,T_SPF_HELO_TEMPERROR autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 29 Apr 2022 08:38:26 -0400, Peter Geis wrote: > This series enables the DesignWare based PCIe controller on the rk356x > series of chips. We drop the fallback to the core driver due to > compatibility issues. We reset the PCIe controller at driver probe to > prevent issues in the future when firmware / kexec leaves the controller > in an unknown state. We add support for legacy interrupts for cards that > lack MSI support (which is partially broken currently). We then add the > device tree nodes to enable PCIe on the Quartz64 Model A. > > [...] Applied, thanks! [4/5] arm64: dts: rockchip: Add rk3568 PCIe2x1 controller commit: c9168492af55bdbc811e05bfc55ae70880bf8ff3 [5/5] arm64: dts: rockchip: Enable PCIe controller on quartz64-a commit: 4f4cbbb147b988daaa036dcf34628d93b2e22cd9 Best regards, -- Heiko Stuebner