Subject: Re: Error in x86 CPU capabilities starting with test5/6
To: cr@sap.com (Christoph Rohland)
Date: Fri, 17 Nov 2000 14:50:33 +0000 (GMT)
Cc: tigran@veritas.com (Tigran Aivazian), ak@suse.de (Andi Kleen),
        jgarzik@mandrakesoft.com (Jeff Garzik),
        alan@lxorguk.ukuu.org.uk (Alan Cox),
        mikpe@csd.uu.se (Mikael Pettersson), ledzep37@home.com (Jordan),
        linux-kernel@vger.kernel.org (Linux Kernel)
In-Reply-To: <qwwsnoqu0vx.fsf@sap.com> from "Christoph Rohland" at Nov 17, 2000 03:30:26 PM
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From: Alan Cox <alan@lxorguk.ukuu.org.uk>
Sender: linux-kernel-owner@vger.kernel.org

> > I thought Linux kernel does synchronize them on boot? So, you are
> > saying I cannot rely on this being 100% correct?
> 
> Yes, it does so far. And if we cannot assume this to be correct in the
> microsecond scale on smp machines with homogenous non-powersaving cpus
> we will loose on some benchmarks. So far it works on all our servers.

It works on most machines. Nothing in the intel specifications says it works.
We cope with offset TSC's in the kernel and those are unusual but exist. If
you have two differently clocked cpus you have to boot notsc.


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