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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id k101-20020a9d19ee000000b006060322123fsm2633837otk.15.2022.05.14.16.14.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 May 2022 16:14:42 -0700 (PDT) Received: (nullmailer pid 3276246 invoked by uid 1000); Sat, 14 May 2022 23:14:41 -0000 From: Rob Herring To: Frank Wunderlich Cc: Michael Riesch , Vinod Koul , Johan Jonker , linux-rockchip@lists.infradead.org, linux-pci@vger.kernel.org, Kishon Vijay Abraham I , linux-kernel@vger.kernel.org, Frank Wunderlich , linux-phy@lists.infradead.org, Bjorn Helgaas , Philipp Zabel , Lorenzo Pieralisi , Peter Geis , Heiko Stuebner , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, Rob Herring , devicetree@vger.kernel.org, =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= In-Reply-To: <20220514115946.8858-2-linux@fw-web.de> References: <20220514115946.8858-1-linux@fw-web.de> <20220514115946.8858-2-linux@fw-web.de> Subject: Re: [RFC v3 1/5] dt-bindings: phy: rockchip: add PCIe v3 phy Date: Sat, 14 May 2022 18:14:40 -0500 Message-Id: <1652570081.002742.3276245.nullmailer@robh.at.kernel.org> X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, 14 May 2022 13:59:42 +0200, Frank Wunderlich wrote: > From: Frank Wunderlich > > Add a new binding file for Rockchip PCIe v3 phy driver. > > Signed-off-by: Frank Wunderlich > > --- > v3: > - drop quotes > - drop rk3588 > - make clockcount fixed to 3 > - full path for binding header file > - drop phy-mode and its header and add lane-map > > v2: > dt-bindings: rename yaml for PCIe v3 > rockchip-pcie3-phy.yaml => rockchip,pcie3-phy.yaml > > changes in pcie3 phy yaml > - change clock names to ordered const list > - extend pcie30-phymode description > - add phy-cells to required properties > - drop unevaluatedProperties > - example with 1 clock each line > - use default property instead of text describing it > - update license > --- > .../bindings/phy/rockchip,pcie3-phy.yaml | 82 +++++++++++++++++++ > 1 file changed, 82 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml: properties:clock-names: 'oneOf' conditional failed, one must be fixed: [{'const': 'refclk_m'}, {'const': 'refclk_n'}, {'const': 'pclk'}] is too long [{'const': 'refclk_m'}, {'const': 'refclk_n'}, {'const': 'pclk'}] is too short False schema does not allow 3 1 was expected 3 is greater than the maximum of 2 hint: "minItems" is only needed if less than the "items" list length from schema $id: http://devicetree.org/meta-schemas/items.yaml# /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml: ignoring, error in schema: properties: clock-names Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.example.dtb:0:0: /example-0/phy@fe8c0000: failed to match any schema with compatible: ['rockchip,rk3568-pcie3-phy'] doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.