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Mon, 16 May 2022 10:19:47 +0000 (GMT) Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E2D53A4054; Mon, 16 May 2022 10:19:46 +0000 (GMT) Received: from osiris (unknown [9.145.19.162]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTPS; Mon, 16 May 2022 10:19:46 +0000 (GMT) Date: Mon, 16 May 2022 12:19:45 +0200 From: Heiko Carstens To: Alexander Gordeev Cc: Nathan Chancellor , Vasily Gorbik , Jonas Paulsson , Ulrich Weigand , Masahiro Yamada , Alexander Egorenkov , Sven Schnelle , Andreas Krebbel , Nathan Chancellor , Nick Desaulniers , linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org Subject: Re: [PATCH 4/8] s390/entry: workaround llvm's IAS limitations Message-ID: References: <20220511120532.2228616-1-hca@linux.ibm.com> <20220511120532.2228616-5-hca@linux.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-TM-AS-GCONF: 00 X-Proofpoint-GUID: cznqW8sqX3mDTXjT8lDsfJQaXmNJw4vi X-Proofpoint-ORIG-GUID: Nm32b99yoNjb8327YiYrJNcuP-aiU3Q- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-16_06,2022-05-16_02,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxlogscore=999 adultscore=0 spamscore=0 phishscore=0 priorityscore=1501 mlxscore=0 lowpriorityscore=0 bulkscore=0 suspectscore=0 impostorscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2205160059 X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, May 16, 2022 at 11:07:43AM +0200, Alexander Gordeev wrote: > > diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S > > index a6b45eaa3450..f2f30bfba1e9 100644 > > --- a/arch/s390/kernel/entry.S > > +++ b/arch/s390/kernel/entry.S > > @@ -172,9 +172,19 @@ _LPP_OFFSET = __LC_LPP > > lgr %r14,\reg > > larl %r13,\start > > slgr %r14,%r13 > > - lghi %r13,\end - \start > > - clgr %r14,%r13 > > +#ifdef CONFIG_AS_IS_LLVM > > + clgfrl %r14,.Lrange_size\@ > > +#else > > + clgfi %r14,\end - \start > > +#endif > > jhe \outside_label > > +#ifdef CONFIG_CC_IS_CLANG > > + .section .rodata, "a" > > + .align 4 > > +.Lrange_size\@: > > + .long \end - \start > > Isn't the machine check handler refers to this memory before checking > unrecoverable storage errors (with CHKSTG macro) as result of this change? Yes, indeed. However implementing this without another register will be quite of a challenge. So what I would prefer in any case: just assume that this minimal set of memory accesses work. Actually I'd seriously like to go a bit further, and even move the checks for storage errors back to C for two reasons: - this would make the machine check handler entry code easier again - it would also allow to enter the machine check handler with DAT on After all we rely anyway on the fact that at least the local lowcore + the page(s) which contain text are still accessible. Assuming that a couple of page tables also work won't make this much worse, but the code much easier. So I'd suggest: leave this code as is, and at some later point move "rework" the early machine check handler code. What do you think?