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Received: from PH7PR12MB6588.namprd12.prod.outlook.com (2603:10b6:510:210::10) by CH2PR12MB4279.namprd12.prod.outlook.com (2603:10b6:610:af::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5250.14; Mon, 16 May 2022 13:27:29 +0000 Received: from PH7PR12MB6588.namprd12.prod.outlook.com ([fe80::f1f6:dd2c:7e78:9770]) by PH7PR12MB6588.namprd12.prod.outlook.com ([fe80::f1f6:dd2c:7e78:9770%6]) with mapi id 15.20.5250.013; Mon, 16 May 2022 13:27:29 +0000 Message-ID: <11052843-8fff-a497-f34e-8e53f846fe7e@amd.com> Date: Mon, 16 May 2022 18:57:11 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.4.1 Subject: Re: [PATCH v2 5/8] perf record ibs: Warn about sampling period skew Content-Language: en-US To: Arnaldo Carvalho de Melo Cc: peterz@infradead.org, rrichter@amd.com, mingo@redhat.com, mark.rutland@arm.com, jolsa@kernel.org, namhyung@kernel.org, tglx@linutronix.de, bp@alien8.de, irogers@google.com, yao.jin@linux.intel.com, james.clark@arm.com, leo.yan@linaro.org, kan.liang@linux.intel.com, ak@linux.intel.com, eranian@google.com, like.xu.linux@gmail.com, x86@kernel.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, sandipan.das@amd.com, ananth.narayan@amd.com, kim.phillips@amd.com, santosh.shukla@amd.com, Ravi Bangoria References: <20220509044914.1473-1-ravi.bangoria@amd.com> <20220509044914.1473-6-ravi.bangoria@amd.com> From: Ravi Bangoria In-Reply-To: Content-Type: text/plain; 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This causes a sampling period skew >> but there is no way to reconstruct aggregated sampling period. So >> print a warning at perf record if user sets l3missonly=1. >> >> Ex: >> # perf record -c 10000 -C 0 -e ibs_op/l3missonly=1/ >> WARNING: Hw internally resets sampling period when L3 Miss Filtering is enabled >> and tagged operation does not cause L3 Miss. This causes sampling period skew. >> >> Signed-off-by: Ravi Bangoria >> --- >> tools/perf/arch/x86/util/evsel.c | 34 ++++++++++++++++++++++++++++++++ >> tools/perf/util/evsel.c | 7 +++++++ >> tools/perf/util/evsel.h | 1 + >> 3 files changed, 42 insertions(+) >> >> diff --git a/tools/perf/arch/x86/util/evsel.c b/tools/perf/arch/x86/util/evsel.c >> index ac2899a25b7a..6399faa70a88 100644 >> --- a/tools/perf/arch/x86/util/evsel.c >> +++ b/tools/perf/arch/x86/util/evsel.c >> @@ -4,6 +4,8 @@ >> #include "util/evsel.h" >> #include "util/env.h" >> #include "linux/string.h" >> +#include "util/pmu.h" >> +#include "util/debug.h" >> >> void arch_evsel__set_sample_weight(struct evsel *evsel) >> { >> @@ -29,3 +31,35 @@ void arch_evsel__fixup_new_cycles(struct perf_event_attr *attr) >> >> free(env.cpuid); >> } >> + >> +static void ibs_l3miss_warn(void) >> +{ >> + pr_warning( >> +"WARNING: Hw internally resets sampling period when L3 Miss Filtering is enabled\n" >> +"and tagged operation does not cause L3 Miss. This causes sampling period skew.\n"); >> +} >> + >> +void arch_evsel__warn_ambiguity(struct evsel *evsel, struct perf_event_attr *attr) >> +{ >> + struct perf_env *env = evsel__env(evsel); >> + struct perf_pmu *evsel_pmu = evsel__find_pmu(evsel); >> + struct perf_pmu *ibs_fetch_pmu = perf_pmu__find("ibs_fetch"); >> + struct perf_pmu *ibs_op_pmu = perf_pmu__find("ibs_op"); >> + static int warned_once; > > Please check first if the warning was emitted (warned_once is true) > before calling all the find routines above. Sure. > >> + if (warned_once || !perf_env__cpuid(env) || !env->cpuid || >> + !strstarts(env->cpuid, "AuthenticAMD") || !evsel_pmu) >> + return; >> + >> + if (ibs_fetch_pmu && ibs_fetch_pmu->type == evsel_pmu->type) { >> + if (attr->config & (1ULL << 59)) { >> + ibs_l3miss_warn(); >> + warned_once = 1; >> + } >> + } else if (ibs_op_pmu && ibs_op_pmu->type == evsel_pmu->type) { >> + if (attr->config & (1ULL << 16)) { >> + ibs_l3miss_warn(); >> + warned_once = 1; >> + } >> + } >> +} >> diff --git a/tools/perf/util/evsel.c b/tools/perf/util/evsel.c >> index 2a1729e7aee4..4f8b72d4a521 100644 >> --- a/tools/perf/util/evsel.c >> +++ b/tools/perf/util/evsel.c >> @@ -1064,6 +1064,11 @@ void __weak arch_evsel__fixup_new_cycles(struct perf_event_attr *attr __maybe_un >> { >> } >> >> +void __weak arch_evsel__warn_ambiguity(struct evsel *evsel __maybe_unused, >> + struct perf_event_attr *attr __maybe_unused) >> +{ >> +} >> + >> static void evsel__set_default_freq_period(struct record_opts *opts, >> struct perf_event_attr *attr) >> { >> @@ -1339,6 +1344,8 @@ void evsel__config(struct evsel *evsel, struct record_opts *opts, >> */ >> if (evsel__is_dummy_event(evsel)) >> evsel__reset_sample_bit(evsel, BRANCH_STACK); >> + >> + arch_evsel__warn_ambiguity(evsel, attr); > > Wouldn't this be better as a single arch__post_evsel_config() function that > could do arch specific fixups or emit such warnings _after_ (thus the > "post") the common code evsel__config() does its thing? Will rename accordingly. Thanks, Ravi