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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id z18-20020a544592000000b00325cda1ffb2sm4334484oib.49.2022.05.16.17.18.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 May 2022 17:18:18 -0700 (PDT) Received: (nullmailer pid 3632950 invoked by uid 1000); Tue, 17 May 2022 00:18:17 -0000 Date: Mon, 16 May 2022 19:18:17 -0500 From: Rob Herring To: Pali =?iso-8859-1?Q?Roh=E1r?= Cc: Thomas Gleixner , Marc Zyngier , Bjorn Helgaas , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Petazzoni , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Marek =?iso-8859-1?Q?Beh=FAn?= , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 1/6] dt-bindings: irqchip: armada-370-xp: Update information about MPIC SoC Error Message-ID: <20220517001817.GA3629501-robh@kernel.org> References: <20220506134029.21470-1-pali@kernel.org> <20220506134029.21470-2-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20220506134029.21470-2-pali@kernel.org> X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 06, 2022 at 03:40:24PM +0200, Pali Roh?r wrote: > Signed-off-by: Pali Roh?r Why do we need/want this change? > --- > .../interrupt-controller/marvell,armada-370-xp-mpic.txt | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt > index 5fc03134a999..8cddbc16ddbd 100644 > --- a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt > +++ b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt > @@ -24,6 +24,11 @@ Optional properties: > connected as a slave to the Cortex-A9 GIC. The provided interrupt > indicate to which GIC interrupt the MPIC output is connected. > > +Optional subnodes: > + > +- interrupt-controller@20 with interrupt-controller property for > + MPIC SoC Error IRQ controller > + > Example: > > mpic: interrupt-controller@d0020000 { > @@ -35,4 +40,8 @@ Example: > msi-controller; > reg = <0xd0020a00 0x1d0>, > <0xd0021070 0x58>; > + soc_err: interrupt-controller@20 { unit address without 'reg' is an error. > + interrupt-controller; > + #interrupt-cells = <1>; > + }; > }; > -- > 2.20.1 > >