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From:   Robert Marko <robimarko@gmail.com>
To:     agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com,
        broonie@kernel.org, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org,
        linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Cc:     Robert Marko <robimarko@gmail.com>
Subject: [PATCH v3 6/6] arm64: dts: ipq8074: add VQMMC supply
Date:   Tue, 17 May 2022 22:53:41 +0200
Message-Id: <20220517205341.536587-6-robimarko@gmail.com>
In-Reply-To: <20220517205341.536587-1-robimarko@gmail.com>
References: <20220517205341.536587-1-robimarko@gmail.com>
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SDHCI controller claims DDR, HS200 and HS400 1.8V support, however it
cannot achieve those using the 2.95V I/O that is the default set by
firmware.

Since we know have access to the PMP8074 PMIC provided LDO that provides
the I/O voltage set it as VQMMC supply so that higher speeds can actually
be achieved.

Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index d1a0b77c38a4..fea3c4ee3565 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -476,6 +476,8 @@ sdhc_1: sdhci@7824900 {
 			mmc-hs400-1_8v;
 			bus-width = <8>;
 
+			vqmmc-supply = <&l11>;
+
 			status = "disabled";
 		};
 
-- 
2.36.1