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[23.128.96.19]) by mx.google.com with ESMTPS id 2-20020a630202000000b003ab018efbe3si1961168pgc.433.2022.05.18.02.47.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 May 2022 02:47:39 -0700 (PDT) Received-SPF: softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) client-ip=23.128.96.19; Authentication-Results: mx.google.com; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 34411B0D05; Wed, 18 May 2022 02:35:34 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234469AbiERJel (ORCPT + 99 others); Wed, 18 May 2022 05:34:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51594 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234368AbiERJeQ (ORCPT ); Wed, 18 May 2022 05:34:16 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 1D793AFB32 for ; Wed, 18 May 2022 02:34:08 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5F6731042; Wed, 18 May 2022 02:34:08 -0700 (PDT) Received: from usa.arm.com (e103737-lin.cambridge.arm.com [10.1.197.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C4DC83F66F; Wed, 18 May 2022 02:34:06 -0700 (PDT) From: Sudeep Holla To: Atish Patra , linux-kernel@vger.kernel.org Cc: Sudeep Holla , Atish Patra , Vincent Guittot , Morten Rasmussen , Dietmar Eggemann , Qing Wang , linux-arm-kernel@lists.infradead.org, linux-riscv@lists.infradead.org, Rob Herring Subject: [PATCH v2 8/8] arch_topology: Add support to build llc_sibling on DT platforms Date: Wed, 18 May 2022 10:33:25 +0100 Message-Id: <20220518093325.2070336-9-sudeep.holla@arm.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220518093325.2070336-1-sudeep.holla@arm.com> References: <20220518093325.2070336-1-sudeep.holla@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RDNS_NONE, SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ACPI PPTT provides cache identifiers and especially the last level cache identifier is used in obtaining last level cache siblings amongst CPUs. While we have the cpu map representing all the CPUs sharing last level cache in the cacheinfo driver, it is populated quite late in the boot while the information is needed to build scheduler domains quite early. On DT platforms we can use the pointer to the last level cache as the firmware identifier for the last level cache and build the cpumap sharing the last level cache based on the same. Cc: Rob Herring Signed-off-by: Sudeep Holla --- drivers/base/arch_topology.c | 18 ++++++++++++++---- include/linux/arch_topology.h | 1 + 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c index 6d3346efe74b..bc57f0f1862e 100644 --- a/drivers/base/arch_topology.c +++ b/drivers/base/arch_topology.c @@ -661,11 +661,14 @@ static int __init parse_dt_topology(void) * Check that all cores are in the topology; the SMP code will * only mark cores described in the DT as possible. */ - for_each_possible_cpu(cpu) + for_each_possible_cpu(cpu) { if (cpu_topology[cpu].package_id < 0) { ret = -EINVAL; break; } + cpu_topology[cpu].llc_fw_node = + of_find_last_level_cache_node(cpu); + } out_map: of_node_put(map); @@ -681,6 +684,12 @@ static int __init parse_dt_topology(void) struct cpu_topology cpu_topology[NR_CPUS]; EXPORT_SYMBOL_GPL(cpu_topology); +#define IS_VALID_LLC_ID(x) \ + ((x)->llc_id >= 0 || (x)->llc_fw_node) +#define IS_MATCH_LLC_ID(x, y) \ + (((x)->llc_id >= 0 && (x)->llc_id == (y)->llc_id) || \ + ((x)->llc_fw_node && (x)->llc_fw_node == (y)->llc_fw_node)) + const struct cpumask *cpu_coregroup_mask(int cpu) { const cpumask_t *core_mask = cpumask_of_node(cpu_to_node(cpu)); @@ -690,7 +699,8 @@ const struct cpumask *cpu_coregroup_mask(int cpu) /* not numa in package, lets use the package siblings */ core_mask = &cpu_topology[cpu].core_sibling; } - if (cpu_topology[cpu].llc_id >= 0) { + + if (IS_VALID_LLC_ID(&cpu_topology[cpu])) { if (cpumask_subset(&cpu_topology[cpu].llc_sibling, core_mask)) core_mask = &cpu_topology[cpu].llc_sibling; } @@ -721,8 +731,7 @@ void update_siblings_masks(unsigned int cpuid) for_each_online_cpu(cpu) { cpu_topo = &cpu_topology[cpu]; - if (cpu_topo->llc_id >= 0 && - cpuid_topo->llc_id == cpu_topo->llc_id) { + if (IS_MATCH_LLC_ID(cpu_topo, cpuid_topo)) { cpumask_set_cpu(cpu, &cpuid_topo->llc_sibling); cpumask_set_cpu(cpuid, &cpu_topo->llc_sibling); } @@ -777,6 +786,7 @@ void __init reset_cpu_topology(void) cpu_topo->cluster_id = -1; cpu_topo->package_id = -1; cpu_topo->llc_id = -1; + cpu_topo->llc_fw_node = NULL; clear_cpu_topology(cpu); } diff --git a/include/linux/arch_topology.h b/include/linux/arch_topology.h index 58cbe18d825c..d8a36b0e27c9 100644 --- a/include/linux/arch_topology.h +++ b/include/linux/arch_topology.h @@ -69,6 +69,7 @@ struct cpu_topology { int cluster_id; int package_id; int llc_id; + void *llc_fw_node; cpumask_t thread_sibling; cpumask_t core_sibling; cpumask_t cluster_sibling; -- 2.36.1