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From:   Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
To:     Marc Zyngier <maz@kernel.org>,
        Geert Uytterhoeven <geert+renesas@glider.be>,
        Thomas Gleixner <tglx@linutronix.de>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Linus Walleij <linus.walleij@linaro.org>,
        Bartosz Golaszewski <brgl@bgdev.pl>,
        Thierry Reding <thierry.reding@gmail.com>,
        Jonathan Hunter <jonathanh@nvidia.com>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Andy Gross <agross@kernel.org>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Andy Shevchenko <andy.shevchenko@gmail.com>,
        linux-gpio@vger.kernel.org, linux-tegra@vger.kernel.org,
        linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org
Cc:     linux-kernel@vger.kernel.org,
        Prabhakar <prabhakar.csengg@gmail.com>,
        linux-renesas-soc@vger.kernel.org,
        Phil Edworthy <phil.edworthy@renesas.com>,
        Biju Das <biju.das.jz@bp.renesas.com>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH v4 5/7] gpio: gpiolib: Add a check to validate GPIO hwirq
Date:   Wed, 18 May 2022 20:29:22 +0100
Message-Id: <20220518192924.20948-6-prabhakar.mahadev-lad.rj@bp.renesas.com>
In-Reply-To: <20220518192924.20948-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
References: <20220518192924.20948-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
Precedence: bulk

Add a check to validate GPIO hwirq is always within the range of hwirq_max
set in the GPIO irq domain.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/gpio/gpiolib.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 65e344a23c6a..c1de7bb54c13 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -1028,6 +1028,7 @@ static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
 	 * it is necessary to keep this around.
 	 */
 	if (is_fwnode_irqchip(gc->irq.fwnode)) {
+		struct irq_domain *domain = gc->irq.domain;
 		int i;
 		int ret;
 
@@ -1061,6 +1062,11 @@ static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
 					 i, ret);
 				continue;
 			}
+			if (WARN(hwirq >= domain->hwirq_max,
+				 "error: hwirq 0x%x is too large for %s\n",
+				 (int)hwirq, domain->name))
+				continue;
+
 			fwspec.fwnode = gc->irq.fwnode;
 			/* This is the hwirq for the GPIO line side of things */
 			fwspec.param[0] = hwirq;
@@ -1436,6 +1442,9 @@ static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)
 		ret = gc->irq.child_offset_to_irq(gc, offset, &hwirq);
 		if (ret)
 			return ret;
+		if (WARN(hwirq >= domain->hwirq_max,
+			 "error: hwirq 0x%x is too large for %s\n", (int)hwirq, domain->name))
+			return -EINVAL;
 		spec.fwnode = domain->fwnode;
 		spec.param_count = 2;
 		spec.param[0] = hwirq;
-- 
2.25.1