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Subject: Re: [PATCH v2] clk: mediatek: use en_mask as a pure div_en_mask
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     miles.chen@mediatek.com, wenst@chromium.org,
        chun-jie.chen@mediatek.com,
        angelogioacchino.delregno@collabora.com, linux-clk@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org,
        Project_Global_Chrome_Upstream_Group@mediatek.com,
        Mandy Liu <mandyjh.liu@mediatek.com>
To:     Mandy Liu <mandyjh.liu@mediatek.com>, mturquette@baylibre.co
Date:   Wed, 18 May 2022 17:42:40 -0700
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Message-Id: <20220519004242.E9572C385A9@smtp.kernel.org>
Precedence: bulk

Quoting Mandy Liu (2022-05-13 00:36:21)
> From: Chun-Jie Chen <chun-jie.chen@mediatek.com>
>=20
> We no longer allow en_mask to be a combination of
> pll_en_bit and div_en_mask, so remove pll_en_bit(bit0)
> from en_mask to make en_mask a pure en_mask that only
> used for pll dividers.
>=20
> This commit continues the work done in commit 7cc4e1bbe300
> ("clk: mediatek: Fix asymmetrical PLL enable and disable
> control") and commit f384c44754b7 ("clk: mediatek:
> Add configurable enable control to mtk_pll_data") to
> clean up en_mask(bit0) default setting.
>=20
> Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
> Signed-off-by: Mandy Liu <mandyjh.liu@mediatek.com>
>=20
> ---

Applied to clk-next