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[2620:137:e000::1:20]) by mx.google.com with ESMTP id j9-20020a1709062a0900b006f40433c5aesi4069817eje.892.2022.05.19.00.26.15; Thu, 19 May 2022 00:26:41 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232027AbiESHV6 (ORCPT + 99 others); Thu, 19 May 2022 03:21:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40080 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229764AbiESHVy (ORCPT ); Thu, 19 May 2022 03:21:54 -0400 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C5667891F for ; Thu, 19 May 2022 00:21:50 -0700 (PDT) Received: from ip5b412258.dynamic.kabel-deutschland.de ([91.65.34.88] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1nraTh-0004Vm-9x; Thu, 19 May 2022 09:21:45 +0200 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Nathan Chancellor Cc: Nick Desaulniers , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, llvm@lists.linux.dev, patches@lists.linux.dev, Nathan Chancellor , Jessica Clarke Subject: Re: [PATCH] riscv: Fix ALT_THEAD_PMA's asm parameters Date: Thu, 19 May 2022 09:21:44 +0200 Message-ID: <3667011.kQq0lBPeGt@diego> In-Reply-To: <20220518184529.454008-1-nathan@kernel.org> References: <20220518184529.454008-1-nathan@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_NONE, T_SCC_BODY_TEXT_LINE,T_SPF_HELO_TEMPERROR autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Mittwoch, 18. Mai 2022, 20:45:29 CEST schrieb Nathan Chancellor: > After commit a35707c3d850 ("riscv: add memory-type errata for T-Head"), > builds with LLVM's integrated assembler fail like: > > In file included from arch/riscv/kernel/asm-offsets.c:10: > In file included from ./include/linux/mm.h:29: > In file included from ./include/linux/pgtable.h:6: > In file included from ./arch/riscv/include/asm/pgtable.h:114: > ./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asm > ALT_THEAD_PMA(prot_val); > ^ > ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA' > : "0"(_val), \ > ^ > > This was reported upstream to LLVM where Jessica pointed out a couple of > issues with the existing implementation of ALT_THEAD_PMA: > > * t3 is modified but not listed in the clobbers list. > > * "+r"(_val) marks _val as both an input and output of the asm but then > "0"(_val) marks _val as an input matching constraint, which does not > make much sense in this situation, as %1 is not actually used in the > asm and matching constraints are designed to be used for different > inputs that need to use the same register. > > Drop the matching contraint and shift all the operands by one, as %1 is > unused, and mark t3 as clobbered. This resolves the build error and goes > not cause any problems with GNU as. > > Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head") > Link: https://github.com/ClangBuiltLinux/linux/issues/1641 > Link: https://github.com/llvm/llvm-project/issues/55514 > Link: https://gcc.gnu.org/onlinedocs/gcc/Simple-Constraints.html > Suggested-by: Jessica Clarke > Signed-off-by: Nathan Chancellor I'm not sure anymore why it ended up the original way, but with this change it definitly looks better Reviewed-by: Heiko Stuebner On an actual D1-Nezha board also Tested-by: Heiko Stuebner Thanks for doing that improvement Heiko > --- > arch/riscv/include/asm/errata_list.h | 14 +++++++------- > 1 file changed, 7 insertions(+), 7 deletions(-) > > diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h > index 9e2888dbb5b1..416ead0f9a65 100644 > --- a/arch/riscv/include/asm/errata_list.h > +++ b/arch/riscv/include/asm/errata_list.h > @@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \ > "nop\n\t" \ > "nop\n\t" \ > "nop", \ > - "li t3, %2\n\t" \ > - "slli t3, t3, %4\n\t" \ > + "li t3, %1\n\t" \ > + "slli t3, t3, %3\n\t" \ > "and t3, %0, t3\n\t" \ > "bne t3, zero, 2f\n\t" \ > - "li t3, %3\n\t" \ > - "slli t3, t3, %4\n\t" \ > + "li t3, %2\n\t" \ > + "slli t3, t3, %3\n\t" \ > "or %0, %0, t3\n\t" \ > "2:", THEAD_VENDOR_ID, \ > ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \ > : "+r"(_val) \ > - : "0"(_val), \ > - "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ > + : "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ > "I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \ > - "I"(ALT_THEAD_PBMT_SHIFT)) > + "I"(ALT_THEAD_PBMT_SHIFT) \ > + : "t3") > #else > #define ALT_THEAD_PMA(_val) > #endif > > base-commit: 93c0651617a62a69717299f1464dda798af8bebb >