Received: by 2002:a6b:500f:0:0:0:0:0 with SMTP id e15csp1260677iob; Thu, 19 May 2022 02:53:58 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxVppaMawu7lmwCS7HQHl/MAmM0RW4CCO+XiFZ4D2wFCfbKJmlz4C4sZRqdkhr/ZbhCOP6d X-Received: by 2002:a05:6402:50c7:b0:427:c764:9331 with SMTP id h7-20020a05640250c700b00427c7649331mr4237999edb.228.1652954038316; Thu, 19 May 2022 02:53:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1652954038; cv=none; d=google.com; s=arc-20160816; b=QCeBwl+hY5GXHsrHOZs6JWgARHHWsZiGeIzDxyW8fFQLc1A+c2ZayCSw1z5IEI0uZi Pnzb76dkE+9tv9FqKUesoCWJguZh8+sclbw3JiPXuMNtPRlqqqb0qHcyLtDT6HDnmW7h d/daxtr94Y9vIHXoDDjqEw+QTt4MKHoPMlbSEVOfn1SqvnnEljqgxpm0Kcj9tZNCkfbo g1btVVqx0jDTRCkW5uoN8H4FaHKP+7IZmhzEmp6L6HWyyYdP6nCGD2sPobllcCCCRr16 EjvwiA6foZvjOVpTwe/YPIAKh0oVD+PXQRz0cORazmHdcOvhHCbf0loM3PsjEZWlWxds 2h4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:message-id:in-reply-to :subject:cc:to:from:date:dkim-signature; bh=+vvNcv81VFPbttraT3Sk1F/w333RTBWjUtovJwtdFHA=; b=x3Hu1mum/rdKdggvSGArXRrA5mEv4ARRbu2Y0YoG+LRE5c5c8LsoN7B97rpgtjt/ym 8i8I411EUwIkRh/LwOExSGjw474apP1mOLwe10LLXdaHiigUe4gmbxKD+sHblPEC19oE cojOmUytgLDMJyDzriH4xG4/iKi6D9jBVP+9Kw2cQnjp4Pyce/azYc2rgTAmqnV8ZDHr 3hV4pO5Yk8+K/lUQIDY6Mr+Igg+CRcyigH8spOILn8SF99tYhsrCcER2Sb8UGPyy1pyg cgMV6K6qyTJO5okVTFd4dAGzwY2oTbvuRRwRyfZYCjGFxWzgHApr7JxjrZBnTWoxWQv9 cvXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=Q0H9nCSE; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id n8-20020a1709067b4800b006f39f25eaaasi4313993ejo.675.2022.05.19.02.53.31; Thu, 19 May 2022 02:53:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=Q0H9nCSE; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235451AbiESI5E (ORCPT + 99 others); Thu, 19 May 2022 04:57:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231704AbiESI5C (ORCPT ); Thu, 19 May 2022 04:57:02 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CBCA956FA1; Thu, 19 May 2022 01:56:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1652950619; x=1684486619; h=date:from:to:cc:subject:in-reply-to:message-id: references:mime-version; bh=wYyL5jNtJLvThuTJXbDz7/sXDwDLXfvwFOauQDsuJu8=; b=Q0H9nCSER7PJ6fj43FHJMW+Z/fBJIxAbHWtRcpYuALTmHc+OuhbUE9EG Ae+U+kOLnxZG5qK+NZCRodmMrY/opw9A0tSgogFazGfk+LheLzjEMh0JP oSJ+SaSgtUVKxXKESamSi1OnSdfjVI0iw15FIA2CItFF30rqk63+qAn7Q mvkyQON8b1lDuBnRd85Jgj+4vE8JJ/6EDeMaTC76TGHPVxjCKS+8+UxOi ZAyP0+n+eDgWwLYO+umaoDQRh8ypJClYtMNDKhVUdh67rAA/Y0I6GIO7g L5Zao1dyXNobj2c8kvmvrT/Pncc3ftEX2LsfONnu0/sPF1wVJ/GhcuCmj A==; X-IronPort-AV: E=McAfee;i="6400,9594,10351"; a="252621613" X-IronPort-AV: E=Sophos;i="5.91,237,1647327600"; d="scan'208";a="252621613" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 May 2022 01:56:59 -0700 X-IronPort-AV: E=Sophos;i="5.91,237,1647327600"; d="scan'208";a="598445313" Received: from ivanovbx-mobl1.ger.corp.intel.com ([10.249.33.234]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 May 2022 01:56:57 -0700 Date: Thu, 19 May 2022 11:56:54 +0300 (EEST) From: =?ISO-8859-15?Q?Ilpo_J=E4rvinen?= To: Jiri Slaby cc: Greg Kroah-Hartman , linux-serial , LKML , Michael Ellerman , Benjamin Herrenschmidt , Paul Mackerras Subject: Re: [PATCH 1/4] serial: pmac_zilog: remove unfinished DBDMA support In-Reply-To: <20220519075653.31356-1-jslaby@suse.cz> Message-ID: <2f7a739f-61b4-a1af-7c9b-70c5b93c6281@linux.intel.com> References: <20220519075653.31356-1-jslaby@suse.cz> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 19 May 2022, Jiri Slaby wrote: > The support for DBDMA was never completed. Remove the the code that only > maps spaces without real work. > > Cc: Michael Ellerman > Cc: Benjamin Herrenschmidt > Cc: Paul Mackerras > Signed-off-by: Jiri Slaby > --- > drivers/tty/serial/pmac_zilog.c | 38 +-------------------------------- > drivers/tty/serial/pmac_zilog.h | 9 -------- > 2 files changed, 1 insertion(+), 46 deletions(-) > > diff --git a/drivers/tty/serial/pmac_zilog.c b/drivers/tty/serial/pmac_zilog.c > index c903085acb8d..2953ff64a892 100644 > --- a/drivers/tty/serial/pmac_zilog.c > +++ b/drivers/tty/serial/pmac_zilog.c How about dropping this too: #include -- i. > @@ -65,9 +65,6 @@ > > #include "pmac_zilog.h" > > -/* Not yet implemented */ > -#undef HAS_DBDMA > - > static char version[] __initdata = "pmac_zilog: 0.6 (Benjamin Herrenschmidt )"; > MODULE_AUTHOR("Benjamin Herrenschmidt "); > MODULE_DESCRIPTION("Driver for the Mac and PowerMac serial ports."); > @@ -1399,7 +1396,7 @@ static int __init pmz_init_port(struct uart_pmac_port *uap) > char name[1]; > } *slots; > int len; > - struct resource r_ports, r_rxdma, r_txdma; > + struct resource r_ports; > > /* > * Request & map chip registers > @@ -1411,35 +1408,6 @@ static int __init pmz_init_port(struct uart_pmac_port *uap) > > uap->control_reg = uap->port.membase; > uap->data_reg = uap->control_reg + 0x10; > - > - /* > - * Request & map DBDMA registers > - */ > -#ifdef HAS_DBDMA > - if (of_address_to_resource(np, 1, &r_txdma) == 0 && > - of_address_to_resource(np, 2, &r_rxdma) == 0) > - uap->flags |= PMACZILOG_FLAG_HAS_DMA; > -#else > - memset(&r_txdma, 0, sizeof(struct resource)); > - memset(&r_rxdma, 0, sizeof(struct resource)); > -#endif > - if (ZS_HAS_DMA(uap)) { > - uap->tx_dma_regs = ioremap(r_txdma.start, 0x100); > - if (uap->tx_dma_regs == NULL) { > - uap->flags &= ~PMACZILOG_FLAG_HAS_DMA; > - goto no_dma; > - } > - uap->rx_dma_regs = ioremap(r_rxdma.start, 0x100); > - if (uap->rx_dma_regs == NULL) { > - iounmap(uap->tx_dma_regs); > - uap->tx_dma_regs = NULL; > - uap->flags &= ~PMACZILOG_FLAG_HAS_DMA; > - goto no_dma; > - } > - uap->tx_dma_irq = irq_of_parse_and_map(np, 1); > - uap->rx_dma_irq = irq_of_parse_and_map(np, 2); > - } > -no_dma: > > /* > * Detect port type > @@ -1505,8 +1473,6 @@ static int __init pmz_init_port(struct uart_pmac_port *uap) > of_device_is_compatible(np->parent->parent, "gatwick")) { > /* IRQs on gatwick are offset by 64 */ > uap->port.irq = irq_create_mapping(NULL, 64 + 15); > - uap->tx_dma_irq = irq_create_mapping(NULL, 64 + 4); > - uap->rx_dma_irq = irq_create_mapping(NULL, 64 + 5); > } > > /* Setup some valid baud rate information in the register > @@ -1526,8 +1492,6 @@ static void pmz_dispose_port(struct uart_pmac_port *uap) > struct device_node *np; > > np = uap->node; > - iounmap(uap->rx_dma_regs); > - iounmap(uap->tx_dma_regs); > iounmap(uap->control_reg); > uap->node = NULL; > of_node_put(np); > diff --git a/drivers/tty/serial/pmac_zilog.h b/drivers/tty/serial/pmac_zilog.h > index fa85b0de5c2f..87337b748d6d 100644 > --- a/drivers/tty/serial/pmac_zilog.h > +++ b/drivers/tty/serial/pmac_zilog.h > @@ -43,7 +43,6 @@ struct uart_pmac_port { > #define PMACZILOG_FLAG_TX_ACTIVE 0x00000040 > #define PMACZILOG_FLAG_IS_IRDA 0x00000100 > #define PMACZILOG_FLAG_IS_INTMODEM 0x00000200 > -#define PMACZILOG_FLAG_HAS_DMA 0x00000400 > #define PMACZILOG_FLAG_RSRC_REQUESTED 0x00000800 > #define PMACZILOG_FLAG_IS_OPEN 0x00002000 > #define PMACZILOG_FLAG_IS_EXTCLK 0x00008000 > @@ -55,13 +54,6 @@ struct uart_pmac_port { > volatile u8 __iomem *control_reg; > volatile u8 __iomem *data_reg; > > -#ifdef CONFIG_PPC_PMAC > - unsigned int tx_dma_irq; > - unsigned int rx_dma_irq; > - volatile struct dbdma_regs __iomem *tx_dma_regs; > - volatile struct dbdma_regs __iomem *rx_dma_regs; > -#endif > - > unsigned char irq_name[8]; > > struct ktermios termios_cache; > @@ -377,7 +369,6 @@ static inline void zssync(struct uart_pmac_port *port) > #define ZS_WANTS_MODEM_STATUS(UP) ((UP)->flags & PMACZILOG_FLAG_MODEM_STATUS) > #define ZS_IS_IRDA(UP) ((UP)->flags & PMACZILOG_FLAG_IS_IRDA) > #define ZS_IS_INTMODEM(UP) ((UP)->flags & PMACZILOG_FLAG_IS_INTMODEM) > -#define ZS_HAS_DMA(UP) ((UP)->flags & PMACZILOG_FLAG_HAS_DMA) > #define ZS_IS_OPEN(UP) ((UP)->flags & PMACZILOG_FLAG_IS_OPEN) > #define ZS_IS_EXTCLK(UP) ((UP)->flags & PMACZILOG_FLAG_IS_EXTCLK) > >