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Date:   Thu, 19 May 2022 19:00:09 +0200
From:   Peter Zijlstra <peterz@infradead.org>
To:     Guenter Roeck <linux@roeck-us.net>
Cc:     x86@kernel.org, linux-kernel@vger.kernel.org, jpoimboe@redhat.com,
        brgerst@gmail.com, jiangshanlai@gmail.com,
        Andrew.Cooper3@citrix.com, mark.rutland@arm.com,
        Borislav Petkov <bp@suse.de>
Subject: Re: [PATCH 3/6] x86/entry: Use PUSH_AND_CLEAR_REGS for compat
Message-ID: <20220519170009.GL2578@worktop.programming.kicks-ass.net>
References: <20220506121431.563656641@infradead.org>
 <20220506121631.293889636@infradead.org>
 <20220519162411.GA4095576@roeck-us.net>
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On Thu, May 19, 2022 at 09:24:11AM -0700, Guenter Roeck wrote:
> On Fri, May 06, 2022 at 02:14:34PM +0200, Peter Zijlstra wrote:
> > Since the upper regs don't exist for ia32 code, preserving them
> > doesn't hurt and it simplifies the code.
> > 
> > This doesn't add any attack surface that would not already be
> > available through INT80.
> > 
> > Notably:
> > 
> >  - 32bit SYSENTER: didn't clear si, dx, cx.
> > 
> >  - 32bit SYSCALL, INT80: *do* clear si since the C functions don't
> >    take a second argument.
> > 
> >  - 64bit: didn't clear si since the C functions take a second
> >    argument; except the error_entry path might have only one argument,
> >    so clearing si was missing here.
> > 
> > 32b SYSENTER should be clearing all those 3 registers, nothing uses them
> > and selftests pass.
> > 
> > Unconditionally clear rsi since it simplifies code.
> > 
> > Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
> > Reviewed-by: Borislav Petkov <bp@suse.de>
> 
> linux-next (next-20220519) crashes due to this patch when booting
> q35:EPYC-Rome in qemu.

Could you try backing out each of the hunks one at a time? They're all
more or less independent.

My bet with this being a #PF on an AMD machine, it's either the SI clear
or the SYSCALL change.