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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id n18-20020a2e9052000000b00253d8962fffsm99317ljg.18.2022.05.19.04.35.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 19 May 2022 04:35:31 -0700 (PDT) Message-ID: <4d9b29e8-b171-e181-e2a7-2c8c80107ab1@linaro.org> Date: Thu, 19 May 2022 13:35:30 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.1 Subject: Re: [PATCH v4 6/6] arm64: dts: qcom: Add PMP8074 DTSI Content-Language: en-US To: Robert Marko Cc: Andy Gross , Bjorn Andersson , lgirdwood@gmail.com, broonie@kernel.org, Rob Herring , krzysztof.kozlowski+dt@linaro.org, linux-arm-msm , open list , Devicetree List , Konrad Dybcio References: <20220518184825.1034976-1-robimarko@gmail.com> <20220518184825.1034976-6-robimarko@gmail.com> <015c60e9-78f6-f0f0-5af0-733a78fbdf65@linaro.org> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 19/05/2022 13:21, Robert Marko wrote: > On Thu, 19 May 2022 at 13:07, Krzysztof Kozlowski > wrote: >> >> On 18/05/2022 20:48, Robert Marko wrote: >>> PMP8074 is a companion PMIC to the Qualcomm IPQ8074 series that is >>> controlled via SPMI. >>> >>> Since we now have support for the regulators inside of it add DTSI >>> for it. >>> >>> Signed-off-by: Robert Marko >>> --- >>> arch/arm64/boot/dts/qcom/pmp8074.dtsi | 38 +++++++++++++++++++++++++++ >> >> This file is not referenced by anything, thus not possible to compile >> nor verify. > > That is correct, I can include it on HK01 which has an SDHCI controller > and thus can consume L11 for VQMMC so that HS200 and higher work. Yes, otherwise this does not have any effect. > > I wanted to include the nodes directly in the SoC DTSI and set L11 as VQMMC > for SDHCI there as this is a companion PMIC and always present, but > the established > procedure is for the PMIC to have its own DTSI and then be included per board. Which was correct suggestion but it is not relevant here. In your previous approach your PMIC would be included on every board via SoC DTSI. Now your PMIC is not included at all. Best regards, Krzysztof