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[2620:137:e000::1:20]) by mx.google.com with ESMTP id qb32-20020a1709077ea000b006f3c67436edsi3946027ejc.459.2022.05.21.12.10.59; Sat, 21 May 2022 12:11:25 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@wujek.eu header.s=protonmail2 header.b=BQFniW+o; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343611AbiESXeO (ORCPT + 99 others); Thu, 19 May 2022 19:34:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236252AbiESXeL (ORCPT ); Thu, 19 May 2022 19:34:11 -0400 Received: from mail-4323.proton.ch (mail-4323.proton.ch [185.70.43.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 878D7111BAA; Thu, 19 May 2022 16:34:10 -0700 (PDT) Date: Thu, 19 May 2022 23:34:01 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=wujek.eu; s=protonmail2; t=1653003248; x=1653262448; bh=LyRrYUAfnrOlxEV8oP2sHMBTRL2yGmI3LgV/g5hKsu8=; h=Date:From:Cc:Reply-To:Subject:Message-ID:Feedback-ID:From:To:Cc: Date:Subject:Reply-To:Feedback-ID:Message-ID; b=BQFniW+okpJQpTrAkOEd0e0zhN2cK2O27PSxKOCRKV+q2e3MKReFAcsgHJkGDB97h nXB+dYoaeRnc6WBq6XJp3FeEZjqEyTIMdQJIr/V0kzee/FsfOSHbddYXWAABS1UmGO lALsYbL5JATJSrfkkr3o+skIRaVFFrTpoYzjhnpjSVA+TiKekSp76nHHuPHZtHSvSI emq+2bP/Ho/9RPEVuDZiferPRf1rSc6bCe7yMZvmQi3QwODFU+AnLEvXfPd/HDV8pN gB9QLL3b+et/IfQ5ocfTi0YelTDnhrhKYSIsbN3SzUMDHrqq6J6vKi0PtQoN+X0Q8F n6IWXvKx2XOhQ== From: Adam Wujek Cc: Adam Wujek , Guenter Roeck , Jean Delvare , linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org Reply-To: Adam Wujek Subject: [PATCH] hwmon: (pmbus) Check PEC support before reading other registers Message-ID: <20220519233334.438621-1-dev_public@wujek.eu> Feedback-ID: 23425257:user:proton MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,MISSING_HEADERS,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Make sure that the support of PEC is determined before the read of other registers. Otherwise the validation of PEC can trigger an error on the read of STATUS_BYTE or STATUS_WORD registers. The problematic scenario is the following. A device with enabled PEC support is up and running and a kernel driver is loaded. Then the driver is unloaded (or device unbound), the HW device is reconfigured externally (e.g. by i2cset) to advertise itself as not supporting PEC. Without the move of the code, at the second load of the driver (or bind) the STATUS_BYTE or STATUS_WORD register is always read with PEC enabled, which is likely to cause a read error resulting with fail of a driver load (or bind). Signed-off-by: Adam Wujek --- Notes: - This commit extends the fix implemented in the commit: 75d2b2b06bd8 hwmon: (pmbus) disable PEC if not enabled - The move of the only line: client->flags &=3D ~I2C_CLIENT_PEC; would make the read of STATUS_BYTE and STATUS_WORD registers that follow always without PEC drivers/hwmon/pmbus/pmbus_core.c | 30 +++++++++++++++++------------- 1 file changed, 17 insertions(+), 13 deletions(-) diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_c= ore.c index e82af82fe4ca..55153a71c170 100644 --- a/drivers/hwmon/pmbus/pmbus_core.c +++ b/drivers/hwmon/pmbus/pmbus_core.c @@ -2308,6 +2308,23 @@ static int pmbus_init_common(struct i2c_client *clie= nt, struct pmbus_data *data, =09struct device *dev =3D &client->dev; =09int page, ret; +=09/* +=09 * Figure out if PEC is enabled before accessing any other register. +=09 * Make sure PEC is disabled, will be enabled later if needed. +=09 */ +=09client->flags &=3D ~I2C_CLIENT_PEC; + +=09/* Enable PEC if the controller and bus supports it */ +=09if (!(data->flags & PMBUS_NO_CAPABILITY)) { +=09=09ret =3D i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY); +=09=09if (ret >=3D 0 && (ret & PB_CAPABILITY_ERROR_CHECK)) { +=09=09=09if (i2c_check_functionality(client->adapter, +=09=09=09=09=09=09 I2C_FUNC_SMBUS_PEC)) { +=09=09=09=09client->flags |=3D I2C_CLIENT_PEC; +=09=09=09} +=09=09} +=09} + =09/* =09 * Some PMBus chips don't support PMBUS_STATUS_WORD, so try =09 * to use PMBUS_STATUS_BYTE instead if that is the case. @@ -2326,19 +2343,6 @@ static int pmbus_init_common(struct i2c_client *clie= nt, struct pmbus_data *data, =09=09data->has_status_word =3D true; =09} -=09/* Make sure PEC is disabled, will be enabled later if needed */ -=09client->flags &=3D ~I2C_CLIENT_PEC; - -=09/* Enable PEC if the controller and bus supports it */ -=09if (!(data->flags & PMBUS_NO_CAPABILITY)) { -=09=09ret =3D i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY); -=09=09if (ret >=3D 0 && (ret & PB_CAPABILITY_ERROR_CHECK)) { -=09=09=09if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_PEC))= { -=09=09=09=09client->flags |=3D I2C_CLIENT_PEC; -=09=09=09} -=09=09} -=09} - =09/* =09 * Check if the chip is write protected. If it is, we can not clear =09 * faults, and we should not try it. Also, in that case, writes into -- 2.17.1