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[2620:137:e000::1:20]) by mx.google.com with ESMTP id hw9-20020a170907a0c900b006fed951b69csi2121413ejc.796.2022.05.22.14.31.48; Sun, 22 May 2022 14:32:40 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=fTpEcYsk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347257AbiETIjH (ORCPT + 99 others); Fri, 20 May 2022 04:39:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347214AbiETIi7 (ORCPT ); Fri, 20 May 2022 04:38:59 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F43F9D4F3; Fri, 20 May 2022 01:38:59 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id CFE5761B0B; Fri, 20 May 2022 08:38:58 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 27026C385AA; Fri, 20 May 2022 08:38:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1653035938; bh=jVvvW+OlkZCh2gb3rdyuw5E31L8Sl2Fot/uy8XyBemw=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=fTpEcYsk+CaV2qze7mX4Ytg6Pej6K9S0Ft34ASKgEa6PpTQk44zcpuBZ3Pk4ij8OB eZulL/6ILVqSu5PvOXP0ubazBOCDw2E2c0+dgiHe1ZQ5X2m0lDtM3quK370eo8tz44 8D7DvVNVhRQTUQu6rymfC3kJcYBuN1mUmWFppX+xNiPf7rBOfNMLybxFqqeYkKDHrQ v1z5URUmzQYa8ZizHT1K1hruPhcBrchV2UTeq/vnUFmUJXJuXjg48AvKGhkwz7VvnY SC0lIbNwQdl95GJKMQpPeWc0JyPc+TFi0Jj/iL9hZwyg5htuu+S7MrfPbnnzKRsfbD F+JnUeBgArh5Q== Received: from sofa.misterjones.org ([185.219.108.64] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nry9v-00CdSv-M0; Fri, 20 May 2022 09:38:55 +0100 Date: Fri, 20 May 2022 09:38:55 +0100 Message-ID: <87k0agmwdc.wl-maz@kernel.org> From: Marc Zyngier To: Dragan Mladjenovic Cc: Thomas Bogendoerfer , Paul Burton , Serge Semin , Thomas Gleixner , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Chao-ying Fu Subject: Re: [PATCH 03/12] irqchip: mips-gic: Introduce gic_with_each_online_cpu() In-Reply-To: <20220519185125.11686-4-Dragan.Mladjenovic@syrmia.com> References: <20220519185125.11686-1-Dragan.Mladjenovic@syrmia.com> <20220519185125.11686-4-Dragan.Mladjenovic@syrmia.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: Dragan.Mladjenovic@syrmia.com, tsbogend@alpha.franken.de, paulburton@kernel.org, fancer.lancer@gmail.com, tglx@linutronix.de, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, cfu@wavecomp.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 19 May 2022 19:51:16 +0100, Dragan Mladjenovic wrote: > > From: Paul Burton > > A few pieces of code in the MIPS GIC driver operate on the GIC local > register block for each online CPU, accessing each via the GIC's > other/redirect register block. This patch abstracts the process of > iterating over online CPUs & configuring the other/redirect region to > access their registers through a new gic_with_each_online_cpu() macro. > > This simplifies users of the new macro slightly, and more importantly > prepares us for handling multi-cluster systems where the register > configuration will be done via the CM's GCR_CL_REDIRECT register. By > abstracting all other/redirect block configuration through this macro, > and the __gic_with_next_online_cpu() function which backs it, users will > trivially gain support for multi-cluster when it is implemented in > __gic_with_next_online_cpu(). > > Signed-off-by: Paul Burton > Signed-off-by: Chao-ying Fu > > diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c > index ff89b36267dd..4872bebe24cf 100644 > --- a/drivers/irqchip/irq-mips-gic.c > +++ b/drivers/irqchip/irq-mips-gic.c No SoB from the sender, odd patch format (no ---), and I didn't get a complete series, which makes it impossible to review things in context (I don't even know what the series is about). Please fix things and resend. M. -- Without deviation from the norm, progress is not possible.