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Fri, 20 May 2022 11:04:29 -0400 (EDT) Message-ID: Date: Fri, 20 May 2022 16:04:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH V11 00/10] irqchip: Add LoongArch-related irqchip drivers Content-Language: en-GB To: Marc Zyngier , Huacai Chen Cc: Thomas Gleixner , linux-kernel@vger.kernel.org, Xuefeng Li , Huacai Chen References: <20220430085344.3127346-1-chenhuacai@loongson.cn> <87v8uk6kfa.wl-maz@kernel.org> From: Jiaxun Yang In-Reply-To: <87v8uk6kfa.wl-maz@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, NICE_REPLY_A,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 在 2022/5/5 16:58, Marc Zyngier 写道: >> LoongArch use ACPI, but ACPI tables cannot describe the hierarchy of >> irqchips, so we initilize the irqchip subsystem in this way (from arch >> code): >> >> cpu_domain = loongarch_cpu_irq_init(); >> liointc_domain = liointc_acpi_init(cpu_domain, acpi_liointc); >> eiointc_domain = eiointc_acpi_init(cpu_domain, acpi_eiointc); >> pch_pic_domain = pch_pic_acpi_init(eiointc_domain, acpi_pchpic); >> pch_msi_domain = pch_msi_acpi_init(eiointc_domain, acpi_pchmsi); > I said no to this in the past, and I'm going to reiterate: this is > *not* acceptable. This obviously doesn't scale and isn't manageable in > the long run. Hardcoding the topology and the probing order in the > kernel code has repeatedly proved to be a disaster, and yet you refuse > to take any input from past experience. This is pretty worrying. Just my two cents here. Those drivers have such a topology just because this was my design to handle irqchip differences between RS780E and LS7A for MIPS-era Loongson. TBH, for LoongArch-era Loongson, they should be handled by the same driver, cuz the topology behind them just looks like GIC PPI SPI and MSI for Arm GIC. PCH PIC and eiointc in combination relays interrupts from peripherals just like SPI. liointc is doing the PPI job. They are not separated modules in hardware, they are interlocked. The system should be treated as a whole, pretty much like how we see Arm's GIC. The topology will last forever for every ACPI enabled LoongArch PC. I see no reason they should be described separately. Adding complicities to ACPI bindings brings no benefit. Changing ACPI binding which is already in final draft stage can only leave us with chaos. Disclaimer: I don't have any connections with Loongson currently. I'm standing at contributor's approach to make statement above. Thanks. - Jiaxun