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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id 194-20020a6301cb000000b003fa6eea8691si1929140pgb.59.2022.05.23.00.26.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 May 2022 00:26:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b="ONMMw/MG"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 36AB91157FE; Sun, 22 May 2022 23:39:45 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344700AbiEUSjU (ORCPT + 99 others); Sat, 21 May 2022 14:39:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235790AbiEUSjS (ORCPT ); Sat, 21 May 2022 14:39:18 -0400 Received: from vps0.lunn.ch (vps0.lunn.ch [185.16.172.187]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 278DB3D1E8; Sat, 21 May 2022 11:39:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=u+CCaJtF3iQl0PRzlEodOhhTq5AcNipDkc0XAaATyi0=; b=ONMMw/MGS0FsktEeV6XBMh4zpm mq4qFsrb3uv2tsgbybKYfixXr2NjV04SwtZTLV8qYhWnC9abWn7LlOJ3Iz6M2gyUckfOYuKgQXBkY /KsvUSfZ2vnsoOpR+Iyvw98k3Drr+HrQ0vXbUEaW19cmlgfaSRLG3/L2/lyRaYOq+P8o=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1nsU0E-003nDX-CU; Sat, 21 May 2022 20:39:02 +0200 Date: Sat, 21 May 2022 20:39:02 +0200 From: Andrew Lunn To: Tommaso Merciai Cc: michael@amarulasolutions.com, alberto.bianchi@amarulasolutions.com, linux-amarula@amarulasolutions.com, linuxfancy@googlegroups.com, Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3] net: phy: DP83822: enable rgmii mode if phy_interface_is_rgmii Message-ID: References: <20220520235846.1919954-1-tommaso.merciai@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220520235846.1919954-1-tommaso.merciai@amarulasolutions.com> X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, May 21, 2022 at 01:58:46AM +0200, Tommaso Merciai wrote: > RGMII mode can be enable from dp83822 straps, and also writing bit 9 > of register 0x17 - RMII and Status Register (RCSR). > When phy_interface_is_rgmii rgmii mode must be enabled, same for > contrary, this prevents malconfigurations of hw straps > > References: > - https://www.ti.com/lit/gpn/dp83822i p66 > > Signed-off-by: Tommaso Merciai > Co-developed-by: Michael Trimarchi > Suggested-by: Alberto Bianchi > Tested-by: Tommaso Merciai Reviewed-by: Andrew Lunn If you want to, you could go further. If bit 9 is clear, bit 5 defines the mode, either RMII or MII. There are interface modes defined for these, so you could get bit 5 as well. Andrew