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Sun, 22 May 2022 22:40:12 -0500 From: Ravi Bangoria To: CC: , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v4 1/5] perf record ibs: Warn about sampling period skew Date: Mon, 23 May 2022 09:09:41 +0530 Message-ID: <20220523033945.1612-2-ravi.bangoria@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220523033945.1612-1-ravi.bangoria@amd.com> References: <20220523033945.1612-1-ravi.bangoria@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: aa8d7b16-078f-4f79-117e-08da3c6dfa41 X-MS-TrafficTypeDiagnostic: DM6PR12MB4878:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: oP2QKueLPTd5gY8JcIcK+/7c/MbaCgGsHnnv50VQxK11HcPUluGmFAWrtVvzuzs5HBjm8BFe2SZnpuOezVcM1k//EbKAtZmBsxkbgk4jMoIriwMN6uW81oXw9zEhQOmfxvO5aMXHBOXW2e8fVhe5wy/5gbLkGeK1EtuTslX1MPZzu+Clee7hovUjEmcEHzCeD9lZW+tss+wHvTCkTQ5POI4kX5t127yWGHMkqt0+QjDrpNHWiDQEjgejvKGymU9w/xAGiLxrExmliGMKDsQsya8MkQ8KbX2FR0rySeRteFVoHCRHMTn6kzJav7wzFf4sC3CAN24Lco+W2CdIdnZNfwlTwqOQ0ZiOoHMkkMhM3YAwJJg2LhUfpDinV1v6TAqqc1IKW+u2KZyY/rIELa8Qr3S3xtaH8Mqw58PYlI8D1VyuTkVjLwlJoep/eHa6HvSmHkmt5A0ZtoSPrOc29LfUMrd01d/w+igSb66orULHdjTu8kwnQGtJGEVclPmnYgTctvbSdurfNdILz/QnPm3ATkjbd59rThZUWFs2az2+PDOHxGcDkFv1RIWncduLTD9tSO8cmQFTU0HcUwUyRpEC7SkL+1lE6kr2hSUB5jUQMdxt9zmizqupsAVqcA59Z2BZkcZo0wMwuGejAQvdbRdoLLZsawKc/NsmxG8g0HgYCStudel9zpWv0YScbrUqPtZN13tOP2BtkgSMVExQsJz/YA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230001)(4636009)(36840700001)(40470700004)(46966006)(7416002)(8676002)(6916009)(316002)(54906003)(5660300002)(70586007)(81166007)(7696005)(44832011)(82310400005)(70206006)(40460700003)(86362001)(6666004)(4326008)(508600001)(356005)(26005)(1076003)(8936002)(426003)(336012)(36860700001)(186003)(83380400001)(16526019)(36756003)(47076005)(2616005)(2906002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 May 2022 03:40:27.2922 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: aa8d7b16-078f-4f79-117e-08da3c6dfa41 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT033.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4878 X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Samples without an L3 miss are discarded and counter is reset with random value (between 1-15 for fetch pmu and 1-127 for op pmu) when IBS L3 miss filtering is enabled. This causes a sampling period skew but there is no way to reconstruct aggregated sampling period. So print a warning at perf record if user sets l3missonly=1. Ex: # perf record -c 10000 -C 0 -e ibs_op/l3missonly=1/ WARNING: Hw internally resets sampling period when L3 Miss Filtering is enabled and tagged operation does not cause L3 Miss. This causes sampling period skew. Signed-off-by: Ravi Bangoria Acked-by: Ian Rogers --- tools/perf/arch/x86/util/evsel.c | 50 ++++++++++++++++++++++++++++++++ tools/perf/util/evsel.c | 7 +++++ tools/perf/util/evsel.h | 1 + 3 files changed, 58 insertions(+) diff --git a/tools/perf/arch/x86/util/evsel.c b/tools/perf/arch/x86/util/evsel.c index ac2899a25b7a..e8ff4ddb53c9 100644 --- a/tools/perf/arch/x86/util/evsel.c +++ b/tools/perf/arch/x86/util/evsel.c @@ -4,6 +4,8 @@ #include "util/evsel.h" #include "util/env.h" #include "linux/string.h" +#include "util/pmu.h" +#include "util/debug.h" void arch_evsel__set_sample_weight(struct evsel *evsel) { @@ -29,3 +31,51 @@ void arch_evsel__fixup_new_cycles(struct perf_event_attr *attr) free(env.cpuid); } + +static void ibs_l3miss_warn(void) +{ + pr_warning( +"WARNING: Hw internally resets sampling period when L3 Miss Filtering is enabled\n" +"and tagged operation does not cause L3 Miss. This causes sampling period skew.\n"); +} + +void arch__post_evsel_config(struct evsel *evsel, struct perf_event_attr *attr) +{ + struct perf_pmu *evsel_pmu, *ibs_fetch_pmu, *ibs_op_pmu; + static int warned_once; + /* 0: Uninitialized, 1: Yes, -1: No */ + static int is_amd; + + if (warned_once || is_amd == -1) + return; + + if (!is_amd) { + struct perf_env *env = evsel__env(evsel); + + if (!perf_env__cpuid(env) || !env->cpuid || + !strstarts(env->cpuid, "AuthenticAMD")) { + is_amd = -1; + return; + } + is_amd = 1; + } + + evsel_pmu = evsel__find_pmu(evsel); + if (!evsel_pmu) + return; + + ibs_fetch_pmu = perf_pmu__find("ibs_fetch"); + ibs_op_pmu = perf_pmu__find("ibs_op"); + + if (ibs_fetch_pmu && ibs_fetch_pmu->type == evsel_pmu->type) { + if (attr->config & (1ULL << 59)) { + ibs_l3miss_warn(); + warned_once = 1; + } + } else if (ibs_op_pmu && ibs_op_pmu->type == evsel_pmu->type) { + if (attr->config & (1ULL << 16)) { + ibs_l3miss_warn(); + warned_once = 1; + } + } +} diff --git a/tools/perf/util/evsel.c b/tools/perf/util/evsel.c index 2a1729e7aee4..e9be9b94a062 100644 --- a/tools/perf/util/evsel.c +++ b/tools/perf/util/evsel.c @@ -1064,6 +1064,11 @@ void __weak arch_evsel__fixup_new_cycles(struct perf_event_attr *attr __maybe_un { } +void __weak arch__post_evsel_config(struct evsel *evsel __maybe_unused, + struct perf_event_attr *attr __maybe_unused) +{ +} + static void evsel__set_default_freq_period(struct record_opts *opts, struct perf_event_attr *attr) { @@ -1339,6 +1344,8 @@ void evsel__config(struct evsel *evsel, struct record_opts *opts, */ if (evsel__is_dummy_event(evsel)) evsel__reset_sample_bit(evsel, BRANCH_STACK); + + arch__post_evsel_config(evsel, attr); } int evsel__set_filter(struct evsel *evsel, const char *filter) diff --git a/tools/perf/util/evsel.h b/tools/perf/util/evsel.h index 041b42d33bf5..207de5082ee9 100644 --- a/tools/perf/util/evsel.h +++ b/tools/perf/util/evsel.h @@ -281,6 +281,7 @@ void evsel__set_sample_id(struct evsel *evsel, bool use_sample_identifier); void arch_evsel__set_sample_weight(struct evsel *evsel); void arch_evsel__fixup_new_cycles(struct perf_event_attr *attr); +void arch__post_evsel_config(struct evsel *evsel, struct perf_event_attr *attr); int evsel__set_filter(struct evsel *evsel, const char *filter); int evsel__append_tp_filter(struct evsel *evsel, const char *filter); -- 2.31.1