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Date:   Fri, 20 May 2022 16:57:08 +0530
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Subject: Re: [PATCH v3 2/3] x86: Remove vendor checks from
 prefer_mwait_c1_over_halt
Content-Language: en-US
To:     Dave Hansen <dave.hansen@intel.com>, linux-kernel@vger.kernel.org,
        len.brown@intel.com
Cc:     Lewis.Carroll@amd.com, Mario.Limonciello@amd.com,
        gautham.shenoy@amd.com, Ananth.Narayan@amd.com, bharata@amd.com,
        len.brown@intel.com, x86@kernel.org, tglx@linutronix.de,
        mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com,
        hpa@zytor.com, peterz@infradead.org, chang.seok.bae@intel.com,
        keescook@chromium.org, metze@samba.org, zhengqi.arch@bytedance.com,
        mark.rutland@arm.com, puwen@hygon.cn, rafael.j.wysocki@intel.com,
        andrew.cooper3@citrix.com, jing2.liu@intel.com,
        jmattson@google.com, pawan.kumar.gupta@linux.intel.com
References: <cover.fba143c82098dffab6bbf0a2f3c4be8bae07ccf1.1652176835.git-series.wyes.karny@amd.com>
 <cb388b0f7893a10f3808b0d963fb209c9127a6f6.1652176835.git-series.wyes.karny@amd.com>
 <b1c9fd6c-9f00-9662-d590-b52ce26d0aca@intel.com>
From:   Wyes Karny <wyes.karny@amd.com>
In-Reply-To: <b1c9fd6c-9f00-9662-d590-b52ce26d0aca@intel.com>
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Hello Dave,

On 5/19/2022 9:30 PM, Dave Hansen wrote:
> On 5/10/22 03:18, Wyes Karny wrote:
>>  static int prefer_mwait_c1_over_halt(const struct cpuinfo_x86 *c)
>>  {
>> +	u32 eax, ebx, ecx, edx;
>> +
>>  	/* User has disallowed the use of MWAIT. Fallback to HALT */
>>  	if (boot_option_idle_override == IDLE_NOMWAIT)
>>  		return 0;
>>  
>> -	if (c->x86_vendor != X86_VENDOR_INTEL)
>> +	/* MWAIT is not supported on this platform. Fallback to HALT */
>> +	if (!cpu_has(c, X86_FEATURE_MWAIT))
>>  		return 0;
>>  
>> -	if (!cpu_has(c, X86_FEATURE_MWAIT) || boot_cpu_has_bug(X86_BUG_MONITOR))
>> +	/* Monitor has a bug. Fallback to HALT */
>> +	if (boot_cpu_has_bug(X86_BUG_MONITOR))
>>  		return 0;
> 
> So, before, we pretty much just assume that all Intel CPUs with MWAIT
> should use MWAIT C1.
> 
>> -	return 1;
>> +	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
>> +
>> +	/*
>> +	 * If MWAIT extensions are not available, it is safe to use MWAIT
>> +	 * with EAX=0, ECX=0.
>> +	 */
>> +	if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED))
>> +		return 1;
>> +
>> +	/*
>> +	 * If MWAIT extensions are available, there should be least one
>> +	 * MWAIT C1 substate present.
>> +	 */
>> +	return (edx & MWAIT_C1_SUBSTATE_MASK);
>>  }
> So, I guess the "If MWAIT extensions are not available" check is
> consistent with the "always use it on Intel" behavior.
> 
> But, this would change the behavior on Intel systems that both have
> CPUID5_ECX_EXTENSIONS_SUPPORTED and do not set bits in
> MWAIT_C1_SUBSTATE_MASK.
> 
> Is that a problem or an improvement?

Prior to commit 69fb3676df3 ("x86 idle: remove mwait_idle() and "idle=mwait" cmdline param")
the decision tree only allowed MWAIT to be the preferred idle state even on Intel CPUs only
when C1 substates were present. It was unconditionally allowed on Intel CPUs only after the
commit b253149b843f ("sched/idle/x86: Restore mwait_idle() to fix boot hangs caused by the 
removal of mwait_idle(). Are there any subsequent Intel processors which have MWAIT but 
no C1 substates ? And is MWAIT preferred to be the default idle state on those CPUs ?


Thanks,
Wyes