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Date:   Sun, 22 May 2022 14:28:23 +0800
From:   Leo Yan <leo.yan@linaro.org>
To:     James Clark <james.clark@arm.com>
Cc:     Arnaldo Carvalho de Melo <acme@kernel.org>,
        Peter Zijlstra <peterz@infradead.org>,
        Ingo Molnar <mingo@redhat.com>,
        Mark Rutland <mark.rutland@arm.com>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Jiri Olsa <jolsa@kernel.org>,
        Namhyung Kim <namhyung@kernel.org>,
        Like Xu <likexu@tencent.com>, Ian Rogers <irogers@google.com>,
        Alyssa Ross <hi@alyssa.is>, Kajol Jain <kjain@linux.ibm.com>,
        Li Huafei <lihuafei1@huawei.com>,
        German Gomez <german.gomez@arm.com>,
        Kan Liang <kan.liang@linux.intel.com>,
        Ali Saidi <alisaidi@amazon.com>,
        linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 00/11] perf c2c: Support display for Arm64
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 <d15bb8a2-2203-cabf-69de-627d0a45efdc@arm.com>
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Hi James,

On Thu, May 19, 2022 at 03:19:09PM +0100, James Clark wrote:

[...]

> Hi Leo,
> 
> I see that the HITM and Store Refs columns (even N/A) are all 0% on Arm.
> Assuming it's a similar example to the x86 one above, does that mean that
> these are always expected to be 0? If so, should they be removed to avoid
> confusion, or is it just a case of the example not producing any non 0
> data for these columns?

On Arm SPE, we need to use 'N/A' for Store Refs, but we doesn't need
HITM.

On x86, we should expect 'N/A' is useless and should be removed.

I will update the view for this.

Thanks for the testing!

Leo