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[23.128.96.19]) by mx.google.com with ESMTPS id u11-20020a17090341cb00b0015893aa584csi11192947ple.272.2022.05.23.01.22.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 May 2022 01:22:07 -0700 (PDT) Received-SPF: softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) client-ip=23.128.96.19; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=CLznKgNL; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id C55A13336E; Mon, 23 May 2022 00:27:37 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230316AbiEWHZq (ORCPT + 99 others); Mon, 23 May 2022 03:25:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59812 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229750AbiEWHYC (ORCPT ); Mon, 23 May 2022 03:24:02 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 44C823A1B8 for ; Mon, 23 May 2022 00:17:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1653290259; x=1684826259; h=message-id:date:mime-version:cc:subject:to:references: from:in-reply-to:content-transfer-encoding; bh=RkBnlh49x7+Hp8WBycVg2h1xf0cxa9S/tNTkHWNfXo8=; b=CLznKgNL7LIwbnzjvOgY+FWTvJDhYhhPjVi+5O7dYW/ZdN+xJQtfByxa SFbTBQo6i1tv4mAC353Zi0UCKMgqBnZHZLq2mc6hGBs4E++oSHk8k6NBm bFjY5KCz6hMDZdiAiyt/aV+eBomH/9LtaJVttgk1rQBsET4HSe0r24BUB JRH+nXAexv4GIsfpryCSCR0Z2es8jKHzj5PfBOIfk1zsDpbUk670Xsvij 2oniKodbCby4uZY5Jdgp5r8rTQW3JS0k1WszzobckakrkF7S4BE3cN/zH RdK2z6F8d5NmZD5rdM+xRws+gM4BZAq+02u/KyraK6jN5iVwpA4LaRe4y g==; X-IronPort-AV: E=McAfee;i="6400,9594,10355"; a="359525441" X-IronPort-AV: E=Sophos;i="5.91,245,1647327600"; d="scan'208";a="359525441" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2022 00:13:01 -0700 X-IronPort-AV: E=Sophos;i="5.91,245,1647327600"; d="scan'208";a="571941238" Received: from jsun39-mobl.ccr.corp.intel.com (HELO [10.255.28.225]) ([10.255.28.225]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2022 00:12:57 -0700 Message-ID: <316981d6-6b40-9e2a-09d3-b0d6f8687247@linux.intel.com> Date: Mon, 23 May 2022 15:12:53 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.1 Cc: baolu.lu@linux.intel.com, Eric Auger , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Jean-Philippe Brucker Subject: Re: [PATCH v7 03/10] iommu/sva: Add iommu_sva_domain support Content-Language: en-US To: Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , Kevin Tian , Ashok Raj , Will Deacon , Robin Murphy , Jean-Philippe Brucker , Dave Jiang , Vinod Koul References: <20220519072047.2996983-1-baolu.lu@linux.intel.com> <20220519072047.2996983-4-baolu.lu@linux.intel.com> From: Baolu Lu In-Reply-To: <20220519072047.2996983-4-baolu.lu@linux.intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-5.8 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,RDNS_NONE,SPF_HELO_NONE, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2022/5/19 15:20, Lu Baolu wrote: > The iommu_sva_domain represents a hardware pagetable that the IOMMU > hardware could use for SVA translation. This adds some infrastructure > to support SVA domain in the iommu common layer. It includes: > > - Add a new struct iommu_sva_domain and new IOMMU_DOMAIN_SVA domain > type. > - Add a new domain ops pointer in iommu_ops. The IOMMU drivers that > support SVA should provide the callbacks. > - Add helpers to allocate and free an SVA domain. > - Add helpers to set an SVA domain to a device and the reverse > operation. > > Some buses, like PCI, route packets without considering the PASID value. > Thus a DMA target address with PASID might be treated as P2P if the > address falls into the MMIO BAR of other devices in the group. To make > things simple, the attach/detach interfaces only apply to devices > belonging to the singleton groups, and the singleton is immutable in > fabric i.e. not affected by hotplug. > > The iommu_set/block_device_pasid() can be used for other purposes, > such as kernel DMA with pasid, mediation device, etc. Hence, it is put > in the iommu.c. > > Suggested-by: Jean-Philippe Brucker > Suggested-by: Jason Gunthorpe > Signed-off-by: Lu Baolu > --- > include/linux/iommu.h | 51 +++++++++++++++++++++++++ > drivers/iommu/iommu-sva-lib.h | 15 ++++++++ > drivers/iommu/iommu-sva-lib.c | 48 +++++++++++++++++++++++ > drivers/iommu/iommu.c | 71 +++++++++++++++++++++++++++++++++++ > 4 files changed, 185 insertions(+) > > diff --git a/include/linux/iommu.h b/include/linux/iommu.h > index 0c358b7c583b..e8cf82d46ce1 100644 > --- a/include/linux/iommu.h > +++ b/include/linux/iommu.h > @@ -64,6 +64,9 @@ struct iommu_domain_geometry { > #define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */ > #define __IOMMU_DOMAIN_DMA_FQ (1U << 3) /* DMA-API uses flush queue */ > > +#define __IOMMU_DOMAIN_SHARED (1U << 4) /* Page table shared from CPU */ > +#define __IOMMU_DOMAIN_HOST_VA (1U << 5) /* Host CPU virtual address */ > + > /* > * This are the possible domain-types > * > @@ -86,6 +89,8 @@ struct iommu_domain_geometry { > #define IOMMU_DOMAIN_DMA_FQ (__IOMMU_DOMAIN_PAGING | \ > __IOMMU_DOMAIN_DMA_API | \ > __IOMMU_DOMAIN_DMA_FQ) > +#define IOMMU_DOMAIN_SVA (__IOMMU_DOMAIN_SHARED | \ > + __IOMMU_DOMAIN_HOST_VA) > > struct iommu_domain { > unsigned type; > @@ -254,6 +259,7 @@ struct iommu_ops { > int (*def_domain_type)(struct device *dev); > > const struct iommu_domain_ops *default_domain_ops; > + const struct iommu_domain_ops *sva_domain_ops; Per Joerg's comment in anther thread, https://lore.kernel.org/linux-iommu/YodVJ7ervpIdWfg+@8bytes.org/ adding a sva_domain_ops here is not the right way to go. If no objection, I will make the sva domain go through the generic domain_alloc/free() callbacks in the next version. Best regards, baolu