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Mon, 23 May 2022 07:41:45 -0700 (PDT) MIME-Version: 1.0 References: <20220522153543.2656-1-jszhang@kernel.org> <20220522153543.2656-3-jszhang@kernel.org> In-Reply-To: <20220522153543.2656-3-jszhang@kernel.org> From: Atish Patra Date: Mon, 23 May 2022 07:41:35 -0700 Message-ID: Subject: Re: [PATCH v2 2/2] riscv: switch has_fpu() to the unified static key mechanism To: Jisheng Zhang Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Anup Patel , linux-riscv , "linux-kernel@vger.kernel.org List" Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, May 22, 2022 at 8:44 AM Jisheng Zhang wrote: > > This is to use the unified static key mechanism instead of putting > static key related here and there. > > Signed-off-by: Jisheng Zhang > --- > arch/riscv/include/asm/switch_to.h | 4 ++-- > arch/riscv/kernel/cpufeature.c | 7 ------- > 2 files changed, 2 insertions(+), 9 deletions(-) > > diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h > index 0a3f4f95c555..11463489fec6 100644 > --- a/arch/riscv/include/asm/switch_to.h > +++ b/arch/riscv/include/asm/switch_to.h > @@ -8,6 +8,7 @@ > > #include > #include > +#include > #include > #include > #include > @@ -56,10 +57,9 @@ static inline void __switch_to_aux(struct task_struct *prev, > fstate_restore(next, task_pt_regs(next)); > } > > -extern struct static_key_false cpu_hwcap_fpu; > static __always_inline bool has_fpu(void) > { > - return static_branch_likely(&cpu_hwcap_fpu); > + return static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_FPU]); > } > #else > static __always_inline bool has_fpu(void) { return false; } > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c > index 89f886b35357..0235391be84b 100644 > --- a/arch/riscv/kernel/cpufeature.c > +++ b/arch/riscv/kernel/cpufeature.c > @@ -21,9 +21,6 @@ unsigned long elf_hwcap __read_mostly; > /* Host ISA bitmap */ > static DECLARE_BITMAP(riscv_isa, RISCV_ISA_EXT_MAX) __read_mostly; > > -#ifdef CONFIG_FPU > -__ro_after_init DEFINE_STATIC_KEY_FALSE(cpu_hwcap_fpu); > -#endif > __ro_after_init DEFINE_STATIC_KEY_ARRAY_FALSE(riscv_isa_ext_keys, RISCV_ISA_EXT_KEY_MAX); > EXPORT_SYMBOL(riscv_isa_ext_keys); > > @@ -239,8 +236,4 @@ void __init riscv_fill_hwcap(void) > if (j >= 0) > static_branch_enable(&riscv_isa_ext_keys[j]); > } > -#ifdef CONFIG_FPU > - if (elf_hwcap & (COMPAT_HWCAP_ISA_F | COMPAT_HWCAP_ISA_D)) > - static_branch_enable(&cpu_hwcap_fpu); > -#endif > } > -- > 2.34.1 > Reviewed-by: Atish Patra -- Regards, Atish