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Date:   Mon, 23 May 2022 17:40:27 +0200
From:   Oleksij Rempel <o.rempel@pengutronix.de>
To:     Mark Brown <broonie@kernel.org>
Cc:     Fabio Estevam <festevam@gmail.com>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
        NXP Linux Team <linux-imx@nxp.com>, kernel@pengutronix.de,
        Shawn Guo <shawnguo@kernel.org>
Subject: Re: [PATCH v1] spi: imx: mx51-ecspi: fix clk polarity and phase
 configuration for CS > 4
Message-ID: <20220523154027.GD20227@pengutronix.de>
References: <20220523073143.778664-1-o.rempel@pengutronix.de>
 <YouLs1xoxOCdyBlU@sirena.org.uk>
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On Mon, May 23, 2022 at 02:27:15PM +0100, Mark Brown wrote:
> On Mon, May 23, 2022 at 09:31:43AM +0200, Oleksij Rempel wrote:
> 
> > -	/* set chip select to use */
> > -	ctrl |= MX51_ECSPI_CTRL_CS(spi->chip_select);
> > +	if (spi->cs_gpiod) {
> > +		chip_select = 0;
> 
> What if someone mixed GPIO and regular chip selects and 0 is one of the
> in use chip selects?  Ideally we should check for an unused chip select
> here, though the current change is still an improvement since we'll at
> least only write in the chip select field.

In case some HW variant has real issue with it, we will need to reduce
amount of supported HW CS and use blacklisted one for GPIOs.

Regards,
Oleksij
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