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[76.210.143.223]) by smtp.gmail.com with ESMTPSA id i12-20020a65484c000000b003fa5855ad66sm2314836pgs.64.2022.05.23.12.52.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 May 2022 12:52:35 -0700 (PDT) Date: Mon, 23 May 2022 12:52:35 -0700 (PDT) X-Google-Original-Date: Mon, 23 May 2022 12:52:31 PDT (-0700) Subject: Re: [PATCH v4 1/1] MAINTAINERS: add polarfire rng, pci and clock drivers In-Reply-To: <875112a6-7328-a40d-bc78-bff4e7d14aa0@microchip.com> CC: Paul Walmsley , aou@eecs.berkeley.edu, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Daire.McNamara@microchip.com, Lewis.Hanly@microchip.com, Cyril.Jean@microchip.com From: Palmer Dabbelt To: Conor.Dooley@microchip.com, Arnd Bergmann Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 23 May 2022 04:42:53 PDT (-0700), Conor.Dooley@microchip.com wrote: > On 05/05/2022 11:55, Conor Dooley wrote: >> Hardware random, PCI and clock drivers for the PolarFire SoC have been >> upstreamed but are not covered by the MAINTAINERS entry, so add them. >> Daire is the author of the clock & PCI drivers, so add him as a >> maintainer in place of Lewis. >> >> Signed-off-by: Conor Dooley > > Hey Palmer, > I know youre busy etc but just a reminder :) Sorry, I didn't realize this was aimed at the RISC-V tree. I'm fine taking it, but it seems like these should have gone in along with the drivers. Arnd: maybe this is really an SOC tree sort of thing? No big deal either way on my end, just let me know. > Thanks, > Conor. > >> --- >> MAINTAINERS | 5 ++++- >> 1 file changed, 4 insertions(+), 1 deletion(-) >> >> diff --git a/MAINTAINERS b/MAINTAINERS >> index fd768d43e048..d7602658b0a5 100644 >> --- a/MAINTAINERS >> +++ b/MAINTAINERS >> @@ -16939,12 +16939,15 @@ N: riscv >> K: riscv >> >> RISC-V/MICROCHIP POLARFIRE SOC SUPPORT >> -M: Lewis Hanly >> M: Conor Dooley >> +M: Daire McNamara >> L: linux-riscv@lists.infradead.org >> S: Supported >> F: arch/riscv/boot/dts/microchip/ >> +F: drivers/char/hw_random/mpfs-rng.c >> +F: drivers/clk/microchip/clk-mpfs.c >> F: drivers/mailbox/mailbox-mpfs.c >> +F: drivers/pci/controller/pcie-microchip-host.c >> F: drivers/soc/microchip/ >> F: include/soc/microchip/mpfs.h >> >