From: "Peter Oruba" <peter.oruba@amd.com>
Organization: AMD
To: "Andrew Morton" <akpm@linux-foundation.org>
Subject: Re: [PATCH 0/2] PCI-X/PCI-Express read control interfaces
Date: Wed, 16 May 2007 13:05:51 +0200
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Am Dienstag, 15. Mai 2007 21:37:21 schrieb Andrew Morton:
> On Tue, 15 May 2007 13:50:27 +0200
>
> "Peter Oruba" <peter.oruba@amd.com> wrote:
> > This patch set introduces a PCI-X / PCI-Express read byte count control
> > interface. Instead of letting every driver to directly read/write to PCI
> > config space for that, an interface is provided. The interface functions
> > then can be used for quirks since some PCI bridges require that read byte
> > count values are set by the BIOS and left unchanged by device drivers.
>
> Some of the patches were wordwrapped, which I fixed.
>
> The way we would merge a feature like this is
>
> - get maintainers to review-and-ack the change
>
> - merge the core patch into Greg's PCI tree and later into
>   mainline.
>
> - Once the base infrastructure is in mainline, feed the per-driver
>   changes into the tree via the appropriate maintainers.
>
> This takes, umm, months and consumes quite a bit of my time.  I'm becoming
> inclined just to slam stuff like this straight in as you've proposed, but
> for now, let's play the game - I split the patches up appropriately.  I
> don't think there's any particular urgency behind this, is there?

I cannot tell how common AM8131 based systems in combination with one of these 
three devices actually are. However, this patch set is essential for those 
systems.


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