Received: by 2002:a05:6602:18e:0:0:0:0 with SMTP id m14csp2757244ioo; Tue, 24 May 2022 05:25:29 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz7xukokapCvGn+qQrXkkbQchgNY5xg2x1K49LePmHI5n8lETlpQWI91Bv1EdH5R+PNKR67 X-Received: by 2002:a17:907:8a17:b0:6ff:160:b9d9 with SMTP id sc23-20020a1709078a1700b006ff0160b9d9mr3318839ejc.726.1653395128807; Tue, 24 May 2022 05:25:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1653395128; cv=none; d=google.com; s=arc-20160816; b=t+BsB2Kg28BRI+D9WgA62Z3tYE9VNdus5Y2uLSRSE2k9/wMQ22SL9vus5YHPQkc5II t9dOgBIYawLjP4OgVspH257efDSpsepH5DP4bDC8BjzguquQsuWxhdL+P0D+99CmoIHH DyICXG1JcBmPpBy3yCu7Gwc/PxN7T78Z97ZXnH/aVgvNJBZga2rUdGa+DGqVUJNJlT8X ytnMAAemYpjx9hSpvIANXyvpZ4MfAN6i0DagY/noMNVVBYsWEJ1uoQgHzg4nj4Qt9u3A lYQckfHC5exPj6JnLRQzBp6mCPjq4YA0GbEg45gy+ktzxjY5Up+a3iXj0QMYampSR38X iVOg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:in-reply-to:from :references:cc:to:content-language:subject:user-agent:mime-version :date:message-id:dkim-signature; bh=wP6WJdvwPKQCVTFkQFeIUDg1EJfm95DI1FuINih206s=; b=a1uWIObCvoGu3Y7hUvy+jautn/5wyk4SzJKcoT8jf1icgNDuvhmqcTQPKeR0pumHwP RXBfkV9+90bBtv0daSBhZkx4HpfG8QnZC5XZHnFmM3a0RqUASqxvtcSoNNpVbk0dlB1t DgcIAyk+AjtD2I2Vddi8o6L2aovwp/0K3omDNo0X6TxjCvk9AIfoVZdMwDr0nKHOygSz TFvEZ2B+dOjsX+UzTc+4OuC/YQHsL8scZ6RwGtzsB0HqQjSBqSR4NbNSFNh7BJycBxz1 8nZYdVFAsyo/Ey1knWSzYlu/242zON7X6gtXAWdmCA8y1Go0RgPSoIHmXU/9hoZYzzsQ TvSg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=JAKDCJ6A; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id fy12-20020a1709069f0c00b006e6c486794bsi8021411ejc.485.2022.05.24.05.25.01; Tue, 24 May 2022 05:25:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=JAKDCJ6A; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234373AbiEXHAS (ORCPT + 99 others); Tue, 24 May 2022 03:00:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46176 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229456AbiEXHAO (ORCPT ); Tue, 24 May 2022 03:00:14 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 01B00544C5; Tue, 24 May 2022 00:00:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1653375613; x=1684911613; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=wP6WJdvwPKQCVTFkQFeIUDg1EJfm95DI1FuINih206s=; b=JAKDCJ6AOxITJaly2AM9xORVOT6hfZyly5PFBu7/dJ0IjuAs4hJU9Y5D u1HupM+b7j+NHE/6eah1jGxGlxTfo5oKawC+3wq7FHAPXdR9xmfoLhZTj kZ3PXzM+oSQ/L3bA/2wpr1l3yJgEV5PrelPSvK6tcKIDwhgAD9Ypzxkse s=; Received: from unknown (HELO ironmsg01-sd.qualcomm.com) ([10.53.140.141]) by alexa-out-sd-01.qualcomm.com with ESMTP; 24 May 2022 00:00:12 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg01-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 May 2022 00:00:11 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 24 May 2022 00:00:11 -0700 Received: from [10.239.133.9] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 24 May 2022 00:00:07 -0700 Message-ID: Date: Tue, 24 May 2022 15:00:05 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.5.1 Subject: Re: [PATCH v7 02/10] Coresight: Add coresight TPDM source driver Content-Language: en-US To: Suzuki K Poulose , Mathieu Poirier , Alexander Shishkin , Konrad Dybcio , Mike Leach CC: Greg Kroah-Hartman , , , , Tingwei Zhang , Yuanfang Zhang , Tao Zhang , Trilok Soni , Hao Zhang , , Bjorn Andersson References: <20220509133947.20987-1-quic_jinlmao@quicinc.com> <20220509133947.20987-3-quic_jinlmao@quicinc.com> <38bb1ec9-56bc-0cdf-6c46-d448a46ec886@arm.com> From: Jinlong Mao In-Reply-To: <38bb1ec9-56bc-0cdf-6c46-d448a46ec886@arm.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-Spam-Status: No, score=-7.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Suzuki, Thank you for the review. On 5/23/2022 4:57 PM, Suzuki K Poulose wrote: > Hi > > On 09/05/2022 14:39, Mao Jinlong wrote: >> Add driver to support Coresight device TPDM (Trace, Profiling and >> Diagnostics Monitor). TPDM is a monitor to collect data from >> different datasets. This change is to add probe/enable/disable >> functions for tpdm source. >> >> Signed-off-by: Tao Zhang >> Signed-off-by: Mao Jinlong >> --- >>   drivers/hwtracing/coresight/Kconfig          |  13 ++ >>   drivers/hwtracing/coresight/Makefile         |   1 + >>   drivers/hwtracing/coresight/coresight-core.c |   5 +- >>   drivers/hwtracing/coresight/coresight-tpdm.c | 146 +++++++++++++++++++ >>   drivers/hwtracing/coresight/coresight-tpdm.h |  26 ++++ >>   include/linux/coresight.h                    |   1 + >>   6 files changed, 191 insertions(+), 1 deletion(-) >>   create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.c >>   create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.h >> >> diff --git a/drivers/hwtracing/coresight/Kconfig >> b/drivers/hwtracing/coresight/Kconfig >> index 514a9b8086e3..5c506a1cd08f 100644 >> --- a/drivers/hwtracing/coresight/Kconfig >> +++ b/drivers/hwtracing/coresight/Kconfig >> @@ -201,4 +201,17 @@ config CORESIGHT_TRBE >>           To compile this driver as a module, choose M here: the >> module will be >>         called coresight-trbe. >> + >> +config CORESIGHT_TPDM >> +    tristate "CoreSight Trace, Profiling & Diagnostics Monitor driver" >> +    select CORESIGHT_LINKS_AND_SINKS >> +    help >> +      This driver provides support for configuring monitor. Monitors >> are >> +      primarily responsible for data set collection and support the >> +      ability to collect any permutation of data set types. Monitors >> are >> +      also responsible for interaction with system cross triggering. > > I find the last statement a bit confusing. Could this be : > >     "Monitors are also connected to the cross triggers." Some tpdm events can be triggered by CTI trigger out. > >> + >> +      To compile this driver as a module, choose M here: the module >> will be >> +      called coresight-tpdm. >> + >>   endif >> diff --git a/drivers/hwtracing/coresight/Makefile >> b/drivers/hwtracing/coresight/Makefile >> index 329a0c704b87..6bb9b1746bc7 100644 >> --- a/drivers/hwtracing/coresight/Makefile >> +++ b/drivers/hwtracing/coresight/Makefile >> @@ -25,5 +25,6 @@ obj-$(CONFIG_CORESIGHT_CPU_DEBUG) += >> coresight-cpu-debug.o >>   obj-$(CONFIG_CORESIGHT_CATU) += coresight-catu.o >>   obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o >>   obj-$(CONFIG_CORESIGHT_TRBE) += coresight-trbe.o >> +obj-$(CONFIG_CORESIGHT_TPDM) += coresight-tpdm.o >>   coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \ >>              coresight-cti-sysfs.o >> diff --git a/drivers/hwtracing/coresight/coresight-core.c >> b/drivers/hwtracing/coresight/coresight-core.c >> index 23ab16dd9b5d..75fe1781df20 100644 >> --- a/drivers/hwtracing/coresight/coresight-core.c >> +++ b/drivers/hwtracing/coresight/coresight-core.c >> @@ -1047,7 +1047,8 @@ static int coresight_validate_source(struct >> coresight_device *csdev, >>       } >>         if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC && >> -        subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) { >> +        subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE && >> +        subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_DATA_ONLY) { >>           dev_err(&csdev->dev, "wrong device subtype in %s\n", >> function); >>           return -EINVAL; >>       } >> @@ -1116,6 +1117,7 @@ int coresight_enable(struct coresight_device >> *csdev) >>           per_cpu(tracer_path, cpu) = path; >>           break; >>       case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: >> +    case CORESIGHT_DEV_SUBTYPE_SOURCE_DATA_ONLY: >>           /* >>            * Use the hash of source's device name as ID >>            * and map the ID to the pointer of the path. >> @@ -1165,6 +1167,7 @@ void coresight_disable(struct coresight_device >> *csdev) >>           per_cpu(tracer_path, cpu) = NULL; >>           break; >>       case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: >> +    case CORESIGHT_DEV_SUBTYPE_SOURCE_DATA_ONLY: >>           hash = hashlen_hash(hashlen_string(NULL, >> dev_name(&csdev->dev))); >>           /* Find the path by the hash. */ >>           path = idr_find(&path_idr, hash); >> diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c >> b/drivers/hwtracing/coresight/coresight-tpdm.c >> new file mode 100644 >> index 000000000000..6a4e2a35053d >> --- /dev/null >> +++ b/drivers/hwtracing/coresight/coresight-tpdm.c >> @@ -0,0 +1,146 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/* >> + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights >> reserved. >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +#include "coresight-priv.h" >> +#include "coresight-tpdm.h" >> + >> +DEFINE_CORESIGHT_DEVLIST(tpdm_devs, "tpdm"); >> + >> +/* TPDM enable operations */ >> +static int tpdm_enable(struct coresight_device *csdev, >> +               struct perf_event *event, u32 mode) >> +{ >> +    struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); >> + >> +    mutex_lock(&drvdata->lock); >> +    if (drvdata->enable) { >> +        mutex_unlock(&drvdata->lock); >> +        return -EBUSY; >> +    } >> + >> +    drvdata->enable = true; >> +    mutex_unlock(&drvdata->lock); >> + >> +    dev_info(drvdata->dev, "TPDM tracing enabled\n"); >> +    return 0; >> +} >> + >> +/* TPDM disable operations */ >> +static void tpdm_disable(struct coresight_device *csdev, >> +             struct perf_event *event) >> +{ >> +    struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); >> + >> +    mutex_lock(&drvdata->lock); >> +    if (!drvdata->enable) { >> +        mutex_unlock(&drvdata->lock); >> +        return; >> +    } >> + >> +    drvdata->enable = false; >> +    mutex_unlock(&drvdata->lock); >> + >> +    dev_info(drvdata->dev, "TPDM tracing disabled\n"); >> +} >> + >> +static const struct coresight_ops_source tpdm_source_ops = { >> +    .enable        = tpdm_enable, >> +    .disable    = tpdm_disable, >> +}; >> + >> +static const struct coresight_ops tpdm_cs_ops = { >> +    .source_ops    = &tpdm_source_ops, >> +}; >> + >> +static int tpdm_probe(struct amba_device *adev, const struct amba_id >> *id) >> +{ >> +    struct device *dev = &adev->dev; >> +    struct coresight_platform_data *pdata; >> +    struct tpdm_drvdata *drvdata; >> +    struct coresight_desc desc = { 0 }; >> + >> +    pdata = coresight_get_platform_data(dev); >> +    if (IS_ERR(pdata)) >> +        return PTR_ERR(pdata); >> +    adev->dev.platform_data = pdata; >> + >> +    /* driver data*/ >> +    drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); >> +    if (!drvdata) >> +        return -ENOMEM; >> +    drvdata->dev = &adev->dev; >> +    dev_set_drvdata(dev, drvdata); >> + >> +    drvdata->base = devm_ioremap_resource(dev, &adev->res); >> +    if (!drvdata->base) >> +        return -ENOMEM; >> + >> +    mutex_init(&drvdata->lock); >> + >> +    /* Set up coresight component description */ >> +    desc.name = coresight_alloc_device_name(&tpdm_devs, dev); >> +    if (!desc.name) >> +        return -ENOMEM; >> +    desc.type = CORESIGHT_DEV_TYPE_SOURCE; >> +    desc.subtype.source_subtype = >> CORESIGHT_DEV_SUBTYPE_SOURCE_DATA_ONLY; >> +    desc.ops = &tpdm_cs_ops; >> +    desc.pdata = adev->dev.platform_data; >> +    desc.dev = &adev->dev; > > desc.access must be initialised here. > >     desc.access = CSDEV_ACCESS_IOMEM(drvdata->base); > >> +    drvdata->csdev = coresight_register(&desc); >> +    if (IS_ERR(drvdata->csdev)) >> +        return PTR_ERR(drvdata->csdev); >> + >> +    /* Decrease pm refcount when probe is done.*/ >> +    pm_runtime_put(&adev->dev); >> + >> +    return 0; >> +} >> + >> +static void __exit tpdm_remove(struct amba_device *adev) >> +{ >> +    struct tpdm_drvdata *drvdata = dev_get_drvdata(&adev->dev); >> + >> +    coresight_unregister(drvdata->csdev); >> +} >> + >> +/* >> + * Different TPDM has different periph id. >> + * The difference is 0-7 bits' value. So ignore 0-7 bits. >> + */ >> +static struct amba_id tpdm_ids[] = { >> +    { >> +        .id = 0x000f0e00, >> +        .mask = 0x000fff00, >> +    }, >> +    { 0, 0}, >> +}; >> + >> +static struct amba_driver tpdm_driver = { >> +    .drv = { >> +        .name   = "coresight-tpdm", >> +        .owner    = THIS_MODULE, >> +        .suppress_bind_attrs = true, >> +    }, >> +    .probe          = tpdm_probe, >> +    .id_table    = tpdm_ids, >> +    .remove        = tpdm_remove, >> +}; >> + >> +module_amba_driver(tpdm_driver); >> + >> +MODULE_LICENSE("GPL v2"); >> +MODULE_DESCRIPTION("Trace, Profiling & Diagnostic Monitor driver"); >> diff --git a/drivers/hwtracing/coresight/coresight-tpdm.h >> b/drivers/hwtracing/coresight/coresight-tpdm.h >> new file mode 100644 >> index 000000000000..94a7748a5426 >> --- /dev/null >> +++ b/drivers/hwtracing/coresight/coresight-tpdm.h >> @@ -0,0 +1,26 @@ >> +/* SPDX-License-Identifier: GPL-2.0 */ >> +/* >> + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights >> reserved. >> + */ >> + >> +#ifndef _CORESIGHT_CORESIGHT_TPDM_H >> +#define _CORESIGHT_CORESIGHT_TPDM_H >> + >> +/** >> + * struct tpdm_drvdata - specifics associated to an TPDM component >> + * @base:       memory mapped base address for this component. >> + * @dev:        The device entity associated to this component. >> + * @csdev:      component vitals needed by the framework. >> + * @lock:       lock for the enable value. >> + * @enable:     enable status of the component. >> + */ >> + >> +struct tpdm_drvdata { >> +    void __iomem        *base; >> +    struct device        *dev; >> +    struct coresight_device    *csdev; >> +    struct mutex        lock; > > Why mutex lock ? Couldn't this be a spinlock ? 1. There is no irq for TPDM 2. As there are 7 dataset types, there will be some FOR loop to configure tpdm registers which may cause some time. > >> +    bool            enable; >> +}; >> + >> +#endif  /* _CORESIGHT_CORESIGHT_TPDM_H */ >> diff --git a/include/linux/coresight.h b/include/linux/coresight.h >> index 247147c11231..a9efac55029d 100644 >> --- a/include/linux/coresight.h >> +++ b/include/linux/coresight.h >> @@ -61,6 +61,7 @@ enum coresight_dev_subtype_source { >>       CORESIGHT_DEV_SUBTYPE_SOURCE_PROC, >>       CORESIGHT_DEV_SUBTYPE_SOURCE_BUS, >>       CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE, >> +    CORESIGHT_DEV_SUBTYPE_SOURCE_DATA_ONLY, > > super minor nit: I find the choice of name a bit odd. > We could simply make it something like : > >     CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS: > > Suzuki I will check and update. > >>   }; >>     enum coresight_dev_subtype_helper { > > _______________________________________________ > CoreSight mailing list -- coresight@lists.linaro.org > To unsubscribe send an email to coresight-leave@lists.linaro.org