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Date:   Tue, 24 May 2022 11:19:38 +0200
From:   Pali =?utf-8?B?Um9ow6Fy?= <pali@kernel.org>
To:     Michael Ellerman <mpe@ellerman.id.au>,
        Benjamin Herrenschmidt <benh@kernel.crashing.org>,
        Paul Mackerras <paulus@samba.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc:     devicetree@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH] powerpc/85xx: P2020: Add fsl,mpc8548-pmc node
Message-ID: <20220524091938.myq5pf4imaczgbqa@pali>
References: <20220506203621.26314-1-pali@kernel.org>
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On Friday 06 May 2022 22:36:21 Pali Rohár wrote:
> P2020 also contains Power Management Controller and their registers at
> offset 0xe0070 compatible with mpc8548. So add PMC node into DTS include
> file fsl/p2020si-post.dtsi

PING?

> Signed-off-by: Pali Rohár <pali@kernel.org>
> ---
>  arch/powerpc/boot/dts/fsl/p2020si-post.dtsi | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
> index 6345629524fe..81b9ab2119be 100644
> --- a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
> @@ -201,4 +201,9 @@
>  		reg = <0xe0000 0x1000>;
>  		fsl,has-rstcr;
>  	};
> +
> +	pmc: power@e0070 {
> +		compatible = "fsl,mpc8548-pmc";
> +		reg = <0xe0070 0x20>;
> +	};
>  };
> -- 
> 2.20.1
>