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[2620:137:e000::1:20]) by mx.google.com with ESMTP id ds7-20020a170907724700b006ff0f87f566si1810841ejc.563.2022.05.25.00.58.40; Wed, 25 May 2022 00:59:06 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VTh31M1e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231292AbiEXI7x (ORCPT + 99 others); Tue, 24 May 2022 04:59:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34406 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234773AbiEXI6t (ORCPT ); Tue, 24 May 2022 04:58:49 -0400 Received: from mail-yw1-x112a.google.com (mail-yw1-x112a.google.com [IPv6:2607:f8b0:4864:20::112a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A59269CF46 for ; Tue, 24 May 2022 01:57:34 -0700 (PDT) Received: by mail-yw1-x112a.google.com with SMTP id 00721157ae682-30026b1124bso17329937b3.1 for ; Tue, 24 May 2022 01:57:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=4Zw+PnzWB8h+ThHJTVyyQUjiYecVhb2sE120uBGAUZA=; b=VTh31M1eL6e8UIMPcgJIYcPPvfYj8HWqbmtoodidhzI5aBLBhG2vv24AOZeU9xSZ+/ ZTevit+H4DUP8hiJpvK1iwmh7W2g+sex1D+1WqunmXX/WtdNtYQBS5SWboZr0RMC/2vD FGkIUt5tWnvP6ROrccfgpJMshWGiLJfi6V6aXmUDBM4jkVEfth+gZqeYxajbpMs9KtXo +GeJ2h9IgLFVZUerBt/v/vLznVkLB4MK6vih5SVCl4Eb0ata5H8t1Kg1pDuX1m9xJP39 jmBxi7ShOVUH1X0HJ5u0kh8A9Vv6DUPHqkeBlnlV+KjBnlM5SBS7q9dxYsOM8EA/QmXt gK+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=4Zw+PnzWB8h+ThHJTVyyQUjiYecVhb2sE120uBGAUZA=; b=gcmgEQSn7zf9jjPImf/run+WikFtw3xxh7vUomhcOMIRvqNKcA9L8rt5QamnofiYCd oXt2ab0Bx/mwX1xF6AUfZcisCGe1OnPs89b6CmVwPJHsE1GElXi7ouX51ScirdBzw2UL ivOfpgmm43vuf8uNnh/xoh2tHX0IWS5x1E3XUQQymY5isYoUvPA9RXyQiquFNsxlaoyo BZASjjJIRYe1ZyBkasZao2mPqd8ND8wSDopvrawcIaP/CRsf59QBbigAefp0Sa4JtFXb vjwfcgIqYqV+c9uDbSMC6X/tm5cKLMh59nKK8UBsTUxGPO3PADLkcu2hXIVgsNAJ7EuH uKlw== X-Gm-Message-State: AOAM532b8QVp+hHqSNPlBUaV3oQaIDQe/SbdszWJCfKfFr9N9ZMzNylq nKz1bJTKOWd/grNU9JhlsuozLmwE6o9UDLF2gEk0Hw== X-Received: by 2002:a81:9ad3:0:b0:300:364b:a78a with SMTP id r202-20020a819ad3000000b00300364ba78amr712012ywg.118.1653382651718; Tue, 24 May 2022 01:57:31 -0700 (PDT) MIME-Version: 1.0 References: <20220523174238.28942-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20220523174238.28942-6-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: <20220523174238.28942-6-prabhakar.mahadev-lad.rj@bp.renesas.com> From: Linus Walleij Date: Tue, 24 May 2022 10:57:20 +0200 Message-ID: Subject: Re: [PATCH v5 5/5] pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interrupt To: Lad Prabhakar Cc: Marc Zyngier , Geert Uytterhoeven , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Bartosz Golaszewski , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Andy Gross , Philipp Zabel , Andy Shevchenko , linux-gpio@vger.kernel.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , linux-renesas-soc@vger.kernel.org, Phil Edworthy , Biju Das Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, May 23, 2022 at 7:43 PM Lad Prabhakar wrote: > Add IRQ domain to RZ/G2L pinctrl driver to handle GPIO interrupt. > > GPIO0-GPIO122 pins can be used as IRQ lines but only 32 pins can be > used as IRQ lines at a given time. Selection of pins as IRQ lines > is handled by IA55 (which is the IRQC block) which sits in between the > GPIO and GIC. > > Signed-off-by: Lad Prabhakar I don't know if I'm too tired or reading it wrong, but it seems you went through the trouble of making it possible to override .free() in the irqdomain in patch 3/5 and yet not using it in this patch 5/5? Yours, Linus Walleij