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Message-ID: <9b39fdbe-2bbf-c0b7-a6fa-3b05d8136336@solid-run.com>
Date:   Wed, 25 May 2022 08:33:37 +0300
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Subject: Re: [PATCH] dt-bindings: net: adin: Fix adi,phy-output-clock
 description syntax
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To:     Geert Uytterhoeven <geert+renesas@glider.be>,
        Michael Hennerich <michael.hennerich@analog.com>,
        "David S . Miller" <davem@davemloft.net>,
        Eric Dumazet <edumazet@google.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Alexandru Ardelean <alexandru.ardelean@analog.com>
Cc:     netdev@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
References: <6fcef2665a6cd86a021509a84c5956ec2efd93ed.1653401420.git.geert+renesas@glider.be>
From:   Josua Mayer <josua@solid-run.com>
In-Reply-To: <6fcef2665a6cd86a021509a84c5956ec2efd93ed.1653401420.git.geert+renesas@glider.be>
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Thank you very much for fixing my mistake ... ... fast!

Am 24.05.22 um 17:11 schrieb Geert Uytterhoeven:
> "make dt_binding_check":
> 
>      Documentation/devicetree/bindings/net/adi,adin.yaml:40:77: [error] syntax error: mapping values are not allowed here (syntax)
> 
> The first line of the description ends with a colon, hence the block
> needs to be marked with a "|".
> 
> Fixes: 1f77204e11f8b9e5 ("dt-bindings: net: adin: document phy clock output properties")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
>   Documentation/devicetree/bindings/net/adi,adin.yaml | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml b/Documentation/devicetree/bindings/net/adi,adin.yaml
> index 77750df0c2c45e19..88611720545df2ce 100644
> --- a/Documentation/devicetree/bindings/net/adi,adin.yaml
> +++ b/Documentation/devicetree/bindings/net/adi,adin.yaml
> @@ -37,7 +37,8 @@ properties:
>       default: 8
>   
>     adi,phy-output-clock:
> -    description: Select clock output on GP_CLK pin. Two clocks are available:
> +    description: |
> +      Select clock output on GP_CLK pin. Two clocks are available:
>         A 25MHz reference and a free-running 125MHz.
>         The phy can alternatively automatically switch between the reference and
>         the 125MHz clocks based on its internal state.