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[23.128.96.19]) by mx.google.com with ESMTPS id p11-20020a056a000b4b00b005191f682507si9457194pfo.63.2022.05.28.11.37.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 May 2022 11:37:59 -0700 (PDT) Received-SPF: softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) client-ip=23.128.96.19; Authentication-Results: mx.google.com; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id BB8191834B; Sat, 28 May 2022 11:32:01 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346286AbiEZOuU (ORCPT + 99 others); Thu, 26 May 2022 10:50:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49214 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347767AbiEZOuS (ORCPT ); Thu, 26 May 2022 10:50:18 -0400 X-Greylist: delayed 439 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Thu, 26 May 2022 07:50:17 PDT Received: from relay07.th.seeweb.it (relay07.th.seeweb.it [5.144.164.168]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 953F056FB8 for ; Thu, 26 May 2022 07:50:17 -0700 (PDT) Received: from [192.168.1.100] (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id 958283FA27; Thu, 26 May 2022 17:05:07 +0200 (CEST) Message-ID: <256a5147-82b1-9453-574e-7c96f244d266@somainline.org> Date: Thu, 26 May 2022 16:42:52 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH v7 5/6] arm64: dts: mt8195: Add efuse node to mt8195 Content-Language: en-US To: Alexandre Bailon , rafael@kernel.org, rui.zhang@intel.com, daniel.lezcano@linaro.org, amitk@kernel.org Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, khilman@baylibre.com, mka@chromium.org, robh+dt@kernel.org, krzk+dt@kernel.org, matthias.bgg@gmail.com, p.zabel@pengutronix.de, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, james.lo@mediatek.com, fan.chen@mediatek.com, louis.yu@mediatek.com, rex-bc.chen@mediatek.com References: <20220524152552.246193-1-abailon@baylibre.com> <20220524152552.246193-6-abailon@baylibre.com> From: AngeloGioacchino Del Regno In-Reply-To: <20220524152552.246193-6-abailon@baylibre.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A, RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Il 24/05/22 17:25, Alexandre Bailon ha scritto: > This adds the efuse node. This will be required by the thermal driver > to get the calibration data. > > Signed-off-by: Alexandre Bailon > --- > arch/arm64/boot/dts/mediatek/mt8195.dtsi | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi > index 0011a8ba8f96..51443e83d906 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi > @@ -1238,6 +1238,23 @@ nor_flash: spi@1132c000 { > status = "disabled"; > }; > > + efuse: efuse@11c10000 { > + compatible = "mediatek,efuse"; > + reg = <0 0x11c10000 0 0x1000>; > + #address-cells = <1>; > + #size-cells = <1>; > + > + lvts_e_data1: data1 { lvts1-calib@1bc > + reg = <0x1bc 0x14>; > + }; > + lvts_e_data2: data1-1 { lvts2-calib@1d0 > + reg = <0x1d0 0x38>; > + }; > + svs_calibration: calib@580 { > + reg = <0x580 0x64>; > + }; > + }; > + > u3phy2: t-phy@11c40000 { > compatible = "mediatek,mt8195-tphy", "mediatek,generic-tphy-v3"; > #address-cells = <1>;