Received: by 2002:a05:6602:18e:0:0:0:0 with SMTP id m14csp2789787ioo; Sun, 29 May 2022 03:53:41 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxJaKGtroAB2GNiiG9Ekh70xtmS/Be/HCAmdlrFHuumhp5dJcvo0NRuK0frjwn2/F44rIR/ X-Received: by 2002:a17:903:1248:b0:151:9708:d586 with SMTP id u8-20020a170903124800b001519708d586mr52052318plh.15.1653821621199; Sun, 29 May 2022 03:53:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1653821621; cv=none; d=google.com; s=arc-20160816; b=aSfUsQrNRkTNjnLm2ikOJkjQIL3+s/LQkN8Xy1kYm+nrG+8VX+ZTG01/Kj0jzdKfK5 jHyNxCrJgkzT6Ab8iqthlanluhB9RVUYx53cdgcJbwAzm69ButluqP/eviAqk+aBZ07E jAazaDUDhKEQJz7i6UeIQiYKKw5Z8zOR7EktEuhnPr6tvpi5AQ5xq0D1vWr2XkyJ54HQ QtHnm02AnHmLPTEO2i+o4UNxaK9dQU4PalpheeXQ+g6lkFhQ5wXAexu6cX0VNJZ095bs SAH4mKv0m98Pl4aWNAVMVWDcXCXRpuM7Um6LoY3pLtcT0xOLSpfuPTyjuve5y3PstqRV aFjg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:in-reply-to:from :references:cc:to:content-language:subject:user-agent:mime-version :date:message-id:dkim-signature; bh=9Fjad3LX2aqxciPw2yV6zusBnHTW7flMH7X7AKKAAN8=; b=n3HiGNNtEv34zWh0cWi8nbgEECxz2MMe7XJkXIuTd57K86dFTNPQGmF8F5rGoWEel3 VhMvO5b6l6zKosQX1aYEVOE+2Gr0oNOCuZZotVLJSber5uwh57zgOa/23DrC+AfmcG4x lwMLxpn18Fbbr+x3Sg0gpel+XzakMTajZeE9IhdCGvsEhN15Fl0Cw2dFyPMRY2WrSUYR AUepFuAqbnBXszq2rsBg3iDejKnR0MuhJ97hsDEOl8LMqjPVCd0dDvcbYvrKqQiIomSd jMz5d5RZQOGJhX0IMjix4e/e24DAs0bUORA+cs9iyy7qHChlLif0xaLWL32r0knlsRCv Nvfg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vCaGBnbn; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id y13-20020a17090322cd00b0015ebfc18d5esi13976762plg.582.2022.05.29.03.53.01; Sun, 29 May 2022 03:53:41 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vCaGBnbn; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229655AbiE2H40 (ORCPT + 99 others); Sun, 29 May 2022 03:56:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40166 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229531AbiE2H4W (ORCPT ); Sun, 29 May 2022 03:56:22 -0400 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DD58F6B01A for ; Sun, 29 May 2022 00:56:20 -0700 (PDT) Received: by mail-ej1-x62c.google.com with SMTP id rs12so15576732ejb.13 for ; Sun, 29 May 2022 00:56:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=message-id:date:mime-version:user-agent:subject:content-language:to :cc:references:from:in-reply-to:content-transfer-encoding; bh=9Fjad3LX2aqxciPw2yV6zusBnHTW7flMH7X7AKKAAN8=; b=vCaGBnbnghKnd5Rf/AmhufBmSAT4HtZxG9WjzXW6O+xpmm1O0a8YF7jYgVpCqlXM06 deCg4hDfdjR1XgeVfLYDLNfFhXzZBxJV/MilI6YoO5er/Y1nbHDRJqqGgXx5aPVOeUV0 k9NCz1zZYdS0aaV0TsxR/4y4F7EG2vBUOrgeAgjG7gO7FE42ymMQh3KmCT3+H5WEY18K w1Kp8FoOjEtb4Fa7LGuQWjCEmZjQKVrPlcn1m955KooaIip+cyKNMlaSHamwgSmyiSyH 8Y8IWK/vrfsqwnzHWHeWz7xKd3nSXinPGoSOrbxf9Cp6kX+eT1ZhZymO15ASd+cNbnra r4bg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:message-id:date:mime-version:user-agent:subject :content-language:to:cc:references:from:in-reply-to :content-transfer-encoding; bh=9Fjad3LX2aqxciPw2yV6zusBnHTW7flMH7X7AKKAAN8=; b=ceCk3ZLmU+61d2tvZSBzrcIIUbVQBJS0C85MRDoM1hPpt8h3DcG8tb5r9p+bMi3WrO 5+Lj+H7HwXISOJ0N/8koyZ5Nqisf4VcA5CtVdEZggPhG/jI0nrE3MzDtRUwL61fliSLE CBFjjxQ6FkiTH9Uo5zbtTfpLhTpHn92CzPM+a/7Vsznu751dZikH6F8CJstimi2xgc0T P0ujjK72ixwWaTxo442O+2pWF4Kb3LrAjVA5iNnTk3Oixi3ZT7RMHgF0HTgKrvof3TNu N/DUQ31+jMWPWHiK1zUVWcgEGY1jx4yOmT392ou6l5xDY7MrNbh/bL8P+U3Kwc3mjp8k Xgeg== X-Gm-Message-State: AOAM531xX9+/wqXkUVedKrgIG6MwzAz7QCajGtdDxj7QMjWFBgwt4c1V fQgX5skhc9JYyCVCVgxN48xrWA== X-Received: by 2002:a17:907:2d29:b0:6fe:c413:d9a4 with SMTP id gs41-20020a1709072d2900b006fec413d9a4mr32366509ejc.694.1653810979449; Sun, 29 May 2022 00:56:19 -0700 (PDT) Received: from [192.168.0.177] (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id z1-20020a1709060ac100b006f3ef214de1sm2930593ejf.71.2022.05.29.00.56.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 29 May 2022 00:56:18 -0700 (PDT) Message-ID: <3c3e7995-ebb4-f57b-eb9f-834a0d55b5ea@linaro.org> Date: Sun, 29 May 2022 09:56:17 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH 1/7] dt-bindings: soc: add bindings for i.MX93 SRC Content-Language: en-US To: Peng Fan , "Peng Fan (OSS)" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "sboyd@kernel.org" , "mturquette@baylibre.com" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" Cc: Aisheng Dong , "l.stach@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , dl-linux-imx , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" References: <20220523113029.842753-1-peng.fan@oss.nxp.com> <20220523113029.842753-2-peng.fan@oss.nxp.com> <5bcbf7d3-daa8-6f00-6743-3d0328a82980@linaro.org> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 27/05/2022 03:47, Peng Fan wrote: > > >> -----Original Message----- >> From: Krzysztof Kozlowski >> Sent: 2022年5月26日 20:08 >> To: Peng Fan ; Peng Fan (OSS) ; >> robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; sboyd@kernel.org; >> mturquette@baylibre.com; shawnguo@kernel.org; s.hauer@pengutronix.de >> Cc: Aisheng Dong ; l.stach@pengutronix.de; >> kernel@pengutronix.de; festevam@gmail.com; dl-linux-imx >> ; devicetree@vger.kernel.org; >> linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org >> Subject: Re: [PATCH 1/7] dt-bindings: soc: add bindings for i.MX93 SRC >> >> On 24/05/2022 14:07, Peng Fan wrote: >>>> Subject: Re: [PATCH 1/7] dt-bindings: soc: add bindings for i.MX93 >>>> SRC >>>> >>>> On 24/05/2022 12:37, Peng Fan wrote: >>>>>> Subject: Re: [PATCH 1/7] dt-bindings: soc: add bindings for i.MX93 >>>>>> SRC >>>>>> >>>>>> On 23/05/2022 13:30, Peng Fan (OSS) wrote: >>>>>>> From: Peng Fan >>>>>>> >>>>>>> Add bindings for i.MX93 System Reset Controller(SRC). SRC supports >>>>>>> resets and power gating for mixes. >>>>>>> >>>>>>> Signed-off-by: Peng Fan >>>>>>> --- >>>>>>> .../bindings/soc/imx/fsl,imx93-src.yaml | 88 >>>>>> +++++++++++++++++++ >>>>>>> include/dt-bindings/power/imx93-power.h | 11 +++ >>>>>>> 2 files changed, 99 insertions(+) create mode 100644 >>>>>>> Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml >>>>>> >>>>>> File should be in respective subsystem, so probably power/reset? >>>>> >>>>> ok, will put under power. >>>>> >>>>>> >>>>>>> create mode 100644 include/dt-bindings/power/imx93-power.h >>>>>>> >>>>>>> diff --git >>>>>>> a/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml >>>>>>> b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml >>>>>>> new file mode 100644 >>>>>>> index 000000000000..d45c1458b9c1 >>>>>>> --- /dev/null >>>>>>> +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml >>>>>>> @@ -0,0 +1,88 @@ >>>>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML >>>>>>> +1.2 >>>>>>> +--- >>>>>>> +$id: >>>>>>> +> > +title: NXP i.MX9 System Reset Controller >>>>>>> + >>>>>>> +maintainers: >>>>>>> + - Peng Fan >>>>>>> + >>>>>>> +description: | >>>>>>> + The System Reset Controller (SRC) is responsible for the >>>>>>> +generation of >>>>>>> + all the system reset signals and boot argument latching. >>>>>>> + >>>>>>> + Its main functions are as follows, >>>>>>> + - Deals with all global system reset sources from other modules, >>>>>>> + and generates global system reset. >>>>>>> + - Responsible for power gating of MIXs (Slices) and their memory >>>>>>> + low power control. >>>>>>> + >>>>>>> +properties: >>>>>>> + compatible: >>>>>>> + items: >>>>>>> + - const: fsl,imx93-src >>>>>>> + - const: syscon >>>>>>> + >>>>>>> + reg: >>>>>>> + maxItems: 1 >>>>>>> + >>>>>>> + slice: >>>>>> >>>>>> Why do you need this subnode, instead of listing domains here? >>>>> >>>>> I follow >>>>> Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml >>>>> >>>>> There are several slices in SRC, just like there are many pgcs in gpcv2. >>>> >>>> Wait, but you have only one slice and you do no allow more of them. >>> >>> Slice is just a group node that could include many child nodes, such >>> as slice { >>> mediamix { >>> }; >>> mlmix { >>> }; >>> } >>> >>> The same >>>> as for gpcv2 - there is only one pgc. What's the point of that node? >>> >>> There are many pgcs, pgc is just a group node there, See >>> arch/arm64/boot/dts/freescale/imx8mp.dtsi. >> >> So this does not explain my question at all. Why do you need "slice" (or >> pgc) node? You have only one slice in this device, so this is some indirect layer >> without meaning... > > There is not only one slice, there are many slices. I use a slice node to group > all the slices, as below: > src: system-controller@xxx { > xxxxx > slice { > media: slice@0 { > } > ml: slice@1 { > } > ddr: slice@2 { > } > } > xxxxx > } > > With a slice node there, it will be also be easy for specific driver to know > specific node. I understand that, you repeat and repeat the same description of what you are doing, but that still does not explain my first question - why do you need superficial slice property containing all the slices? Best regards, Krzysztof