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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id t13-20020a63534d000000b003fa9ade1c5asi3399074pgl.81.2022.06.01.13.18.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Jun 2022 13:18:47 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; dkim=pass header.i=@ffwll.ch header.s=google header.b="JJ+o//A3"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 16E9918FA44; Wed, 1 Jun 2022 12:31:56 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344245AbiEaMce (ORCPT + 99 others); Tue, 31 May 2022 08:32:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56126 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237954AbiEaMcd (ORCPT ); Tue, 31 May 2022 08:32:33 -0400 Received: from mail-oo1-xc33.google.com (mail-oo1-xc33.google.com [IPv6:2607:f8b0:4864:20::c33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A2AE9DF5C for ; Tue, 31 May 2022 05:32:31 -0700 (PDT) Received: by mail-oo1-xc33.google.com with SMTP id e13-20020a4a884d000000b004154e612440so781149ooi.0 for ; Tue, 31 May 2022 05:32:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=b5n2e4xJe4nQRM9S+eJYL96ssz1qtMJPh3cecd/u2F4=; b=JJ+o//A34GebRbOJoHtnLj39Zi8DsGE1hjWaF5Yleq55rZ5bJCBipkp6EPDIE8WxT7 YE6XSDgz7cL8BGPmpugti3iz78JnNisFF1n9+wBnkSVtJtsuRU78JcSDzHoyGKN+zROb Sv3O2XUm+gJKXhEy2Uu2o0ZLGWhpeDEBJyiAk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=b5n2e4xJe4nQRM9S+eJYL96ssz1qtMJPh3cecd/u2F4=; b=IXhhGUFlxJzu/VVlcYsowbDoRpjtS6fT7rEb7UVBsxNc9Cup5pzQEYxKlnvUs0jQPX GelN/L/aC1vg30pulsiSeOmUlqvXy1j6TBbkX/4zlhk3OgBQAhdEKs7AoVPb7KWYKn6R V6X+YbBFbdUiHh3wJEdkF0DJiozm2tI9c/1fNnho71e5lrKcKLDxu9EBUA5v4Yme5PmH VvoMuiOHeaBL80+Q1QlZYaQ90Zapv2KGiGmC3Z4SwiD6oidAlg33qYFLmZ1dFr9Ki5mj xHyE+rhJHMvXoHeFhOgnovZ/ijFQwlAZ/Gma8iosuRrCWG3yr+KUC7qN1TByGFt23fHn zB6w== X-Gm-Message-State: AOAM531HwFuD/mTiYe0W35iP9Y3eP8ds+DCYSvwImI89uS5gHU36N0o/ ST67LTKoZaaOBtkNgsdAsoNM2QO1Le2KX8Srl6xNpw== X-Received: by 2002:a4a:870d:0:b0:35f:7c65:1340 with SMTP id z13-20020a4a870d000000b0035f7c651340mr23177842ooh.46.1654000350734; Tue, 31 May 2022 05:32:30 -0700 (PDT) MIME-Version: 1.0 References: <20220529162936.2539901-1-robdclark@gmail.com> <0bf230f4-c888-b9c9-f061-7450406baa4a@suse.de> In-Reply-To: From: Daniel Vetter Date: Tue, 31 May 2022 14:32:19 +0200 Message-ID: Subject: Re: [PATCH] drm/prime: Ensure mmap offset is initialized To: Rob Clark Cc: Thomas Zimmermann , Rob Clark , David Airlie , linux-arm-msm , open list , dri-devel , Gerd Hoffmann , freedreno Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 30 May 2022 at 17:41, Rob Clark wrote: > > On Mon, May 30, 2022 at 7:49 AM Daniel Vetter wrote: > > > > On Mon, 30 May 2022 at 15:54, Rob Clark wrote: > > > > > > On Mon, May 30, 2022 at 12:26 AM Thomas Zimmermann wrote: > > > > > > > > Hi > > > > > > > > Am 29.05.22 um 18:29 schrieb Rob Clark: > > > > > From: Rob Clark > > > > > > > > > > If a GEM object is allocated, and then exported as a dma-buf fd w= hich is > > > > > mmap'd before or without the GEM buffer being directly mmap'd, th= e > > > > > vma_node could be unitialized. This leads to a situation where t= he CPU > > > > > mapping is not correctly torn down in drm_vma_node_unmap(). > > > > > > > > Which drivers are affected by this problem? > > > > > > > > I checked several drivers and most appear to be initializing the of= fset > > > > during object construction, such as GEM SHMEM. [1] TTM-based driver= s > > > > also seem unaffected. [2] > > > > > > > > From a quick grep, only etnaviv, msm and omapdrm appear to be affe= cted? > > > > They only seem to run drm_gem_create_mmap_offset() from their > > > > ioctl-handling code. > > > > > > > > If so, I'd say it's preferable to fix these drivers and put a > > > > drm_WARN_ONCE() into drm_gem_prime_mmap(). > > > > > > That is good if fewer drivers are affected, however I disagree with > > > your proposal. At least for freedreno userspace, a lot of bo's never > > > get mmap'd (either directly of via dmabuf), so we should not be > > > allocating a mmap offset unnecessarily. > > > > Does this actually matter in the grand scheme of things? We originally > > allocated mmap offset only on demand because userspace only had 32bit > > loff_t support and so simply couldn't mmap anything if the offset > > ended up above 32bit (even if there was still va space available). > > > > But those days are long gone (about 10 years or so) and the allocation > > overhead for an mmap offset is tiny. So I think unless you can > > benchmark an impact allocating it at bo alloc seems like the simplest > > design overall, and hence what we should be doing. And if the vma > > offset allocation every gets too slow due to fragmentation we can lift > > the hole tree from i915 into drm_mm and the job should be done. At > > that point we could also allocate the offset unconditionally in the > > gem_init function and be done with it. > > > > Iow I concur with Thomas here, unless there's hard data contrary > > simplicity imo trumps here. > > 32b userspace is still alive and well, at least on arm chromebooks ;-) There's lots of different 32b userspace. The old thing was about userspace which didn't use mmap64, but only mmap. Which could only mmap the lower 4GB of a file, and so if you ended up with mmap_offset above 4G then you'd blow up. But mmap64 is a thing since forever, and if you compile with the right glibc switch (loff_t is the magic thing iirc) it all works even with default mmap. So I really don't think you should have this problem anymore (except when cros is doing something really, really silly). -Daniel > > BR, > -R > > > -Daniel > > > > > > > > BR, > > > -R > > > > > > > Best regards > > > > Thomas > > > > > > > > [1] > > > > https://elixir.bootlin.com/linux/v5.18/source/drivers/gpu/drm/drm_g= em_shmem_helper.c#L85 > > > > [2] > > > > https://elixir.bootlin.com/linux/v5.18/source/drivers/gpu/drm/ttm/t= tm_bo.c#L1002 > > > > > > > > > > > > > > Fixes: e5516553999f ("drm: call drm_gem_object_funcs.mmap with fa= ke offset") > > > > > Signed-off-by: Rob Clark > > > > > --- > > > > > Note, it's possible the issue existed in some related form prior = to the > > > > > commit tagged with Fixes. > > > > > > > > > > drivers/gpu/drm/drm_prime.c | 5 +++++ > > > > > 1 file changed, 5 insertions(+) > > > > > > > > > > diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_pr= ime.c > > > > > index e3f09f18110c..849eea154dfc 100644 > > > > > --- a/drivers/gpu/drm/drm_prime.c > > > > > +++ b/drivers/gpu/drm/drm_prime.c > > > > > @@ -716,6 +716,11 @@ int drm_gem_prime_mmap(struct drm_gem_object= *obj, struct vm_area_struct *vma) > > > > > struct file *fil; > > > > > int ret; > > > > > > > > > > + /* Ensure that the vma_node is initialized: */ > > > > > + ret =3D drm_gem_create_mmap_offset(obj); > > > > > + if (ret) > > > > > + return ret; > > > > > + > > > > > /* Add the fake offset */ > > > > > vma->vm_pgoff +=3D drm_vma_node_start(&obj->vma_node); > > > > > > > > > > > > > -- > > > > Thomas Zimmermann > > > > Graphics Driver Developer > > > > SUSE Software Solutions Germany GmbH > > > > Maxfeldstr. 5, 90409 N=C3=BCrnberg, Germany > > > > (HRB 36809, AG N=C3=BCrnberg) > > > > Gesch=C3=A4ftsf=C3=BChrer: Ivo Totev > > > > > > > > -- > > Daniel Vetter > > Software Engineer, Intel Corporation > > http://blog.ffwll.ch --=20 Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch