Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Message-ID: <7e1ddcb4-8e89-e7cf-3abf-b6dfba09102c@nvidia.com>
Date:   Thu, 2 Jun 2022 17:04:13 +0530
User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101
 Thunderbird/91.3.2
Subject: Re: [PATCH] PCI: tegra194: Fix PM error handling in
 tegra_pcie_config_ep
Content-Language: en-US
To:     Miaoqian Lin <linmq006@gmail.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        Rob Herring <robh@kernel.org>,
        =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= <kw@linux.com>,
        Bjorn Helgaas <bhelgaas@google.com>,
        Thierry Reding <thierry.reding@gmail.com>,
        Jonathan Hunter <jonathanh@nvidia.com>,
        Om Prakash Singh <omp@nvidia.com>,
        Fan Fei <ffclaire1224@gmail.com>, linux-pci@vger.kernel.org,
        linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
References: <20220602031910.55859-1-linmq006@gmail.com>
From:   Vidya Sagar <vidyas@nvidia.com>
In-Reply-To: <20220602031910.55859-1-linmq006@gmail.com>
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 7bit
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?eGg3YUZ2aXJYK3lwWXk1TURtVVZZQkFmVXJhL2UrSkhyQ0VQdUxHQXZFNzZa?=
 =?utf-8?B?MElldXBnTWhYVVFwVW5zdE9pTWJHZ0dUejJUcm5nc1F5WHpFalE0UEhEaklY?=
 =?utf-8?B?VnovajBVa2czVXdiZDlNN3NUUDJkRGtKRlRlM2RIUEY0SU0yOU5jeEZtcnJx?=
 =?utf-8?B?akcvampQTUlvMm8vRUJidnVKcG9SeTBEeXM5VHFZL29xS25CWVIrYWpuUG5s?=
 =?utf-8?B?WXVVMlQxQ0VTVmVILzlJTVBwUVlTblI0VHBMYmk1OEQ3aWo3dDVIT2hpeExB?=
 =?utf-8?B?c0pkU3lHZ2J4YmZOMmZlWW5Fb1YwVHlmYktKSndKeWFicEZiNkRadE84ZHlH?=
 =?utf-8?B?bkNWQmxIb0NZeHBhZGNYUG00OXhZeHpHMCs0d2dpOTNlUEFJa3JvcUc1MnpK?=
 =?utf-8?B?WjNwdTgrNGFaWlE3RTgvbjZ2SEVsR2JVMVpVRGRuamxPdlhDVS9QL2FTT1Jr?=
 =?utf-8?B?ak13T1YyU0ozcm9uUXlWeEd1eDNnMGZiSEMrSjRQbEIvMjRibDdPSTB0UDFp?=
 =?utf-8?B?bmg1TW11VjdjVS9lQm9PVy9iQnJwUUxPSU1VYzIzbFQ3dVVrNFZNVnVNeEZx?=
 =?utf-8?B?SDBsWHdFc09kUldqZWJseU5Bem1iVkt2M0tJVFhvNGQvTHR5VDBRZEM4dmkv?=
 =?utf-8?B?TzUycjBqYjhPeUdyK1RGaHJ4eDl5eG5oR3BXUTdFMlhPd0pJRFN4dFhPWjh2?=
 =?utf-8?B?Y1hGSllGWEt0akcxUmROUHREZTZLcERNR1pJV25UdkN3YU5kd09lQVVDalBm?=
 =?utf-8?B?aWE3dHdJUUwyTXhoVHNqZm9UQXNGV1hWSnpEVTdNN2dXTlorcXpscXhXamk4?=
 =?utf-8?B?a2N0aUNRUmZOOHRLaFErdDZaeGxnWk1sVkk2eERFeThCZVA4VXIvWXI2TndI?=
 =?utf-8?B?QWVLNWMzbUNYOTdQZnoxQWVIbnJ3VUovRDBVNGZQa2EyMFdLZ2RnTlRjMFdS?=
 =?utf-8?B?bXlnblhUU1UzQ2JLd08vakh5QVlKbWJOT2NPTTRYVGVDUVk3RDl1SGJadGo1?=
 =?utf-8?B?cUxzOTcvWVFNVkxDSy91ckNnQ1FPRjJabWo3b1NrZko5c09pbEVIWTRyTWRj?=
 =?utf-8?B?OGpHQVhkTzNtKzdRUzRDUVAzdU02dkdHSW1UU1JVTEJxUDBDMU9yVXdGYmI5?=
 =?utf-8?B?cEJKN01JM1RnWlpabDVMa09HdGNUOUQ4SEZ1MXlpc3VOcDl5c0RxcEczdUlH?=
 =?utf-8?B?RkF2KzJTR244dit4NzhqSURYalgycW5XU09US3k0YmNIMjhZQm41dFF1WUpa?=
 =?utf-8?B?TWcwblpVUHdUdHFzT0lrS3NBTC9qcTY5Ly9vMDhLSHVmazNZbk9raGxvanpn?=
 =?utf-8?B?enl6M2RPZ3NYeGNrbUtZQ1ZPbzAvVTh1OUN0bUtuR2tnZDdkUzI2SHFaUkty?=
 =?utf-8?B?cGZ0aUFMR2VyeENEdk9nTzZLRjlWWFdVc3o2NElvWlRQVjlqZXV5Vmc0NjB3?=
 =?utf-8?B?bTdwQUlaazdWc2haQkhNejNMZ3dYUHVYTm1NbFZ1N01xMHhaUHFMTHhLaG9G?=
 =?utf-8?B?RXVqYXVZNTB3alZ1cXhRVXdNNXhlSHhQa01JODM1c2c2S1kwMXBmSHlESHJ3?=
 =?utf-8?B?NnRUYWxsZm5YMWIrK2Y4aWw5ZUdwejRrN1pCTzRLa0Rra1RzcTJoSXpPSUZt?=
 =?utf-8?B?YVNWZHk1SXNrTkxydDdxcFBqTitydVNQVmlsWjZ5bTA5VmF6UC9IV0NENWlJ?=
 =?utf-8?B?UUZCcXZGWlBhSkgxRmN0UVlPZm5ETnFtZDJBTzFKeCs1eUtGRkszQ1pTd3Jk?=
 =?utf-8?B?TjJjQUhVd095K3BCZVpKZ2ZUVVFjSFBwZmpKdEZxazZSSGlEVmJRdkdmL1VY?=
 =?utf-8?B?cVdQZno5Y3M1WDVzVEJLZXp4WTBDcmp1R2lWcFFPcHptcElmYWJiV1VUSzZ6?=
 =?utf-8?B?NkZTdGJJaEYwUGRHcldYS3VmNWZjREpwUFZvR3ozVE5adUNYTTVUMUVHdGRk?=
 =?utf-8?B?WDgwUGc2NklKNTdPUlF6VDFldmI2Y2lQSi9kNG1SNWJOZDc3aGp5bEwxUUJv?=
 =?utf-8?B?WE94NnBIcHBkb1huaGFqUUc2NTZlVDV2ZER4WUhiTVV6UlRKa25YQzUrUUoz?=
 =?utf-8?B?cXhBNTlGNkwvalFsV2dsSDlPOWQ4VFdzY2RwdDlxcUduTUZWRkpSTEJIN2NF?=
 =?utf-8?B?cUxRL3lHMUFTNHRDT1JQTy9KU1hwMW9BVHdQcms2QjhTcjc2V0FxeGNDWWQ5?=
 =?utf-8?B?Y2xHTSsvMzQ5Vy9hSlJvUEd6em05SjVqVGdDaXI1NjhZaUVBNTBhR1g1d2tv?=
 =?utf-8?B?M3ZUVGdDT1RqMEw2b0J1WUdSSjk5TVZjeHczcExyNlREa0lSckhSUVBoeVRV?=
 =?utf-8?B?S1lEM1cyTTUwUFAvVytRTHhHSlNjT1c5RzZvN1dpalR0NHZ3SC9vUT09?=
X-OriginatorOrg: Nvidia.com
X-MS-Exchange-CrossTenant-Network-Message-Id: 61f3aff7-28ad-4dea-e307-08da448bd9af
X-MS-Exchange-CrossTenant-AuthSource: BN8PR12MB2900.namprd12.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jun 2022 11:34:27.3890
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: ovNK1ZR8CEINQu5z8huoBnb0ZOZbAnU4dePxEw9zjpuG9ieK0aFtL6EuxhZhM40Y4dt+lKF9U/kRUyPL7xM/4g==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR12MB3092
X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,
        DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO,
        NICE_REPLY_A,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,
        SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no
        version=3.4.6
X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on
        lindbergh.monkeyblade.net
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Thanks for pushing the change.

Reviewed-by: Vidya Sagar <vidyas@nvidia.com>

On 6/2/2022 8:49 AM, Miaoqian Lin wrote:
> External email: Use caution opening links or attachments
> 
> 
> The pm_runtime_enable() will increase power disable depth.
> if dw_pcie_ep_init() fails, we should use pm_runtime_disable()
> to balance it pm_runtime_enable().
> Add missing pm_runtime_disable() for tegra_pcie_config_ep()
> 
> Fixes: c57247f940e8 ("PCI: tegra: Add support for PCIe endpoint mode in Tegra194")
> Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
> ---
>   drivers/pci/controller/dwc/pcie-tegra194.c | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index cc2678490162..d992371a36e6 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -1949,6 +1949,7 @@ static int tegra_pcie_config_ep(struct tegra194_pcie *pcie,
>          if (ret) {
>                  dev_err(dev, "Failed to initialize DWC Endpoint subsystem: %d\n",
>                          ret);
> +               pm_runtime_disable(dev);
>                  return ret;
>          }
> 
> --
> 2.25.1
>