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From:   Frank Wunderlich <frank-w@public-files.de>
To:     Rob Herring <robh@kernel.org>
Cc:     Frank Wunderlich <linux@fw-web.de>,
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Subject: Aw: Re: Re: [RFC v3 1/5] dt-bindings: phy: rockchip: add PCIe v3
 phy
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Date:   Thu, 2 Jun 2022 15:47:42 +0200
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> Gesendet: Freitag, 20. Mai 2022 um 13:50 Uhr
> Von: "Frank Wunderlich" <frank-w@public-files.de>
> An: "Rob Herring" <robh@kernel.org>
> Hi,
>
> fixed reg-error by using 32bit-address in example, in my test output is =
clean.
>
> +++ b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml
> @@ -68,7 +68,7 @@ examples:
>      #include <dt-bindings/clock/rk3568-cru.h>
>      pcie30phy: phy@fe8c0000 {
>        compatible =3D "rockchip,rk3568-pcie3-phy";
> -      reg =3D <0x0 0xfe8c0000 0x0 0x20000>;
> +      reg =3D <0xfe8c0000 0x20000>;
>
>
> i hope yours is clean too

have you tried it?

> regarding data-lanes instead of own lane-map, Peter and me only find thi=
s in special
> bindings outside the phy-"namespace" like this.
>
> https://elixir.bootlin.com/linux/v5.18-rc7/source/Documentation/devicetr=
ee/bindings/media/video-interfaces.yaml#L157
>
> do you mean converting this binding and add it there and base out bindin=
g on it?
>
> https://elixir.bootlin.com/linux/v5.18-rc7/source/Documentation/devicetr=
ee/bindings/phy/phy-bindings.txt

is this the right binding to add the data-lanes or do you refer another on=
e (have not found phy-provider)?

regards Frank