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 <20220602115141.3962749-4-chenhuacai@loongson.cn> <YplnruNz++gABlU0@debian.me>
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From:   Huacai Chen <chenhuacai@gmail.com>
Date:   Fri, 3 Jun 2022 13:27:00 +0800
Message-ID: <CAAhV-H5Hi_gYvrO6DAGGA=OVExunCubNpDBdkRBxFxiP1APAKw@mail.gmail.com>
Subject: Re: [PATCH V14 03/24] Documentation: LoongArch: Add basic documentations
To:     Bagas Sanjaya <bagasdotme@gmail.com>
Cc:     Huacai Chen <chenhuacai@loongson.cn>,
        Arnd Bergmann <arnd@arndb.de>,
        Andy Lutomirski <luto@kernel.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Peter Zijlstra <peterz@infradead.org>,
        Andrew Morton <akpm@linux-foundation.org>,
        David Airlie <airlied@linux.ie>,
        Jonathan Corbet <corbet@lwn.net>,
        Linus Torvalds <torvalds@linux-foundation.org>,
        linux-arch <linux-arch@vger.kernel.org>,
        "open list:DOCUMENTATION" <linux-doc@vger.kernel.org>,
        LKML <linux-kernel@vger.kernel.org>,
        Xuefeng Li <lixuefeng@loongson.cn>,
        Yanteng Si <siyanteng@loongson.cn>,
        Guo Ren <guoren@kernel.org>, Xuerui Wang <kernel@xen0n.name>,
        Jiaxun Yang <jiaxun.yang@flygoat.com>,
        Stephen Rothwell <sfr@canb.auug.org.au>,
        WANG Xuerui <git@xen0n.name>
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Hi, Bagas,

On Fri, Jun 3, 2022 at 9:45 AM Bagas Sanjaya <bagasdotme@gmail.com> wrote:
>
> On Thu, Jun 02, 2022 at 07:51:20PM +0800, Huacai Chen wrote:
> > +Legacy IRQ model
> > +================
> > +
> > +In this model, IPI (Inter-Processor Interrupt) and CPU Local Timer interrupt go
> > +to CPUINTC directly, CPU UARTS interrupts go to LIOINTC, while all other devices
> > +interrupts go to PCH-PIC/PCH-LPC/PCH-MSI and gathered by HTVECINTC, and then go
> > +to LIOINTC, and then CPUINTC.
> > +
> > + +---------------------------------------------+
> > + |::                                           |
> > + |                                             |
> > + |    +-----+     +---------+     +-------+    |
> > + |    | IPI | --> | CPUINTC | <-- | Timer |    |
> > + |    +-----+     +---------+     +-------+    |
> > + |                     ^                       |
> > + |                     |                       |
> > + |                +---------+     +-------+    |
> > + |                | LIOINTC | <-- | UARTs |    |
> > + |                +---------+     +-------+    |
> > + |                     ^                       |
> > + |                     |                       |
> > + |               +-----------+                 |
> > + |               | HTVECINTC |                 |
> > + |               +-----------+                 |
> > + |                ^         ^                  |
> > + |                |         |                  |
> > + |          +---------+ +---------+            |
> > + |          | PCH-PIC | | PCH-MSI |            |
> > + |          +---------+ +---------+            |
> > + |            ^     ^           ^              |
> > + |            |     |           |              |
> > + |    +---------+ +---------+ +---------+      |
> > + |    | PCH-LPC | | Devices | | Devices |      |
> > + |    +---------+ +---------+ +---------+      |
> > + |         ^                                   |
> > + |         |                                   |
> > + |    +---------+                              |
> > + |    | Devices |                              |
> > + |    +---------+                              |
> > + |                                             |
> > + |                                             |
> > + +---------------------------------------------+
> > +
> > +Extended IRQ model
> > +==================
> > +
> > +In this model, IPI (Inter-Processor Interrupt) and CPU Local Timer interrupt go
> > +to CPUINTC directly, CPU UARTS interrupts go to LIOINTC, while all other devices
> > +interrupts go to PCH-PIC/PCH-LPC/PCH-MSI and gathered by EIOINTC, and then go to
> > +to CPUINTC directly.
> > +
> > + +--------------------------------------------------------+
> > + |::                                                      |
> > + |                                                        |
> > + |         +-----+     +---------+     +-------+          |
> > + |         | IPI | --> | CPUINTC | <-- | Timer |          |
> > + |         +-----+     +---------+     +-------+          |
> > + |                      ^       ^                         |
> > + |                      |       |                         |
> > + |               +---------+ +---------+     +-------+    |
> > + |               | EIOINTC | | LIOINTC | <-- | UARTs |    |
> > + |               +---------+ +---------+     +-------+    |
> > + |                ^       ^                               |
> > + |                |       |                               |
> > + |         +---------+ +---------+                        |
> > + |         | PCH-PIC | | PCH-MSI |                        |
> > + |         +---------+ +---------+                        |
> > + |           ^     ^           ^                          |
> > + |           |     |           |                          |
> > + |   +---------+ +---------+ +---------+                  |
> > + |   | PCH-LPC | | Devices | | Devices |                  |
> > + |   +---------+ +---------+ +---------+                  |
> > + |        ^                                               |
> > + |        |                                               |
> > + |   +---------+                                          |
> > + |   | Devices |                                          |
> > + |   +---------+                                          |
> > + |                                                        |
> > + |                                                        |
> > + +--------------------------------------------------------+
> > +
>
> I think for consistency with other diagrams in Documentation/, just use
> literal code block, like:
>
> diff --git a/Documentation/loongarch/irq-chip-model.rst b/Documentation/loongarch/irq-chip-model.rst
> index 35c962991283ff..3cfd528021de05 100644
> --- a/Documentation/loongarch/irq-chip-model.rst
> +++ b/Documentation/loongarch/irq-chip-model.rst
> @@ -24,40 +24,38 @@ to CPUINTC directly, CPU UARTS interrupts go to LIOINTC, while all other devices
>  interrupts go to PCH-PIC/PCH-LPC/PCH-MSI and gathered by HTVECINTC, and then go
>  to LIOINTC, and then CPUINTC.
>
> - +---------------------------------------------+
> - |::                                           |
> - |                                             |
> - |    +-----+     +---------+     +-------+    |
> - |    | IPI | --> | CPUINTC | <-- | Timer |    |
> - |    +-----+     +---------+     +-------+    |
> - |                     ^                       |
> - |                     |                       |
> - |                +---------+     +-------+    |
> - |                | LIOINTC | <-- | UARTs |    |
> - |                +---------+     +-------+    |
> - |                     ^                       |
> - |                     |                       |
> - |               +-----------+                 |
> - |               | HTVECINTC |                 |
> - |               +-----------+                 |
> - |                ^         ^                  |
> - |                |         |                  |
> - |          +---------+ +---------+            |
> - |          | PCH-PIC | | PCH-MSI |            |
> - |          +---------+ +---------+            |
> - |            ^     ^           ^              |
> - |            |     |           |              |
> - |    +---------+ +---------+ +---------+      |
> - |    | PCH-LPC | | Devices | | Devices |      |
> - |    +---------+ +---------+ +---------+      |
> - |         ^                                   |
> - |         |                                   |
> - |    +---------+                              |
> - |    | Devices |                              |
> - |    +---------+                              |
> - |                                             |
> - |                                             |
> - +---------------------------------------------+
> + ::
> +
> +     +-----+     +---------+     +-------+
> +     | IPI | --> | CPUINTC | <-- | Timer |
> +     +-----+     +---------+     +-------+
> +                      ^
> +                      |
> +                 +---------+     +-------+
> +                 | LIOINTC | <-- | UARTs |
> +                 +---------+     +-------+
> +                      ^
> +                      |
> +                +-----------+
> +                | HTVECINTC |
> +                +-----------+
> +                 ^         ^
> +                 |         |
> +           +---------+ +---------+
> +           | PCH-PIC | | PCH-MSI |
> +           +---------+ +---------+
> +             ^     ^           ^
> +             |     |           |
> +     +---------+ +---------+ +---------+
> +     | PCH-LPC | | Devices | | Devices |
> +     +---------+ +---------+ +---------+
> +          ^
> +          |
> +     +---------+
> +     | Devices |
> +     +---------+
> +
> +
>
>  Extended IRQ model
>  ==================
> @@ -67,35 +65,33 @@ to CPUINTC directly, CPU UARTS interrupts go to LIOINTC, while all other devices
>  interrupts go to PCH-PIC/PCH-LPC/PCH-MSI and gathered by EIOINTC, and then go to
>  to CPUINTC directly.
>
> - +--------------------------------------------------------+
> - |::                                                      |
> - |                                                        |
> - |         +-----+     +---------+     +-------+          |
> - |         | IPI | --> | CPUINTC | <-- | Timer |          |
> - |         +-----+     +---------+     +-------+          |
> - |                      ^       ^                         |
> - |                      |       |                         |
> - |               +---------+ +---------+     +-------+    |
> - |               | EIOINTC | | LIOINTC | <-- | UARTs |    |
> - |               +---------+ +---------+     +-------+    |
> - |                ^       ^                               |
> - |                |       |                               |
> - |         +---------+ +---------+                        |
> - |         | PCH-PIC | | PCH-MSI |                        |
> - |         +---------+ +---------+                        |
> - |           ^     ^           ^                          |
> - |           |     |           |                          |
> - |   +---------+ +---------+ +---------+                  |
> - |   | PCH-LPC | | Devices | | Devices |                  |
> - |   +---------+ +---------+ +---------+                  |
> - |        ^                                               |
> - |        |                                               |
> - |   +---------+                                          |
> - |   | Devices |                                          |
> - |   +---------+                                          |
> - |                                                        |
> - |                                                        |
> - +--------------------------------------------------------+
> + ::
> +
> +          +-----+     +---------+     +-------+
> +          | IPI | --> | CPUINTC | <-- | Timer |
> +          +-----+     +---------+     +-------+
> +                       ^       ^
> +                       |       |
> +                +---------+ +---------+     +-------+
> +                | EIOINTC | | LIOINTC | <-- | UARTs |
> +                +---------+ +---------+     +-------+
> +                 ^       ^
> +                 |       |
> +          +---------+ +---------+
> +          | PCH-PIC | | PCH-MSI |
> +          +---------+ +---------+
> +            ^     ^           ^
> +            |     |           |
> +    +---------+ +---------+ +---------+
> +    | PCH-LPC | | Devices | | Devices |
> +    +---------+ +---------+ +---------+
> +         ^
> +         |
> +    +---------+
> +    | Devices |
> +    +---------+
> +
> +
>
>  ACPI-related definitions
>  ========================
>
> Otherwise, htmldocs builds successfully without any new warnings related
> to this patch series.
Thank you for your testing. In my environment (sphinx_2.4.4), with or
without the border both have no warnings. :)
And I think these are more pretty if we keep the border, especially
when formatted into PDF. How do you think?

Huacai
>
> Tested-by: Bagas Sanjaya <bagasdotme@gmail.com>
>
> --
> An old man doll... just what I always wanted! - Clara