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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SJ0PR12MB5676.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 86f518b2-4e0e-4982-2379-08da45785af1 X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Jun 2022 15:47:24.9866 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: GjPANc6QzleS3o6vl3e4eYJ5s60i7RhmBHLUiubc7xWyQieubx+5eUuL6bOsBPU1+7ggaNlJpA8FObQOLTPZ4A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR12MB1470 X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, I was wondering if there are any other comments that need to be addressed i= n this patch ? Regards, Besar > -----Original Message----- > From: Besar Wicaksono > Sent: Wednesday, May 25, 2022 1:49 AM > To: suzuki.poulose@arm.com; robin.murphy@arm.com; > catalin.marinas@arm.com; will@kernel.org; mark.rutland@arm.com > Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; > linux-tegra@vger.kernel.org; sudeep.holla@arm.com; > thanu.rangarajan@arm.com; Michael.Williams@arm.com; Thierry Reding > ; Jonathan Hunter ; Vikram > Sethi ; Besar Wicaksono > Subject: [PATCH v3 0/2] perf: ARM CoreSight PMU support >=20 > Add driver support for ARM CoreSight PMU device and event attributes for > NVIDIA > implementation. The code is based on ARM Coresight PMU architecture and > ACPI ARM > Performance Monitoring Unit table (APMT) specification below: > * ARM Coresight PMU: > https://developer.arm.com/documentation/ihi0091/latest > * APMT: https://developer.arm.com/documentation/den0117/latest >=20 > Notes: > * There is a concern on the naming of the PMU device. > Currently the driver is probing "arm-coresight-pmu" device, however th= e > APMT > spec supports different kinds of CoreSight PMU based implementation. S= o > it is > open for discussion if the name can stay or a "generic" name is requir= ed. > Please see the following thread: > http://lists.infradead.org/pipermail/linux-arm-kernel/2022- > May/740485.html >=20 > The patchset applies on top of > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git > master next-20220524 >=20 > Changes from v2: > * Driver is now probing "arm-system-pmu" device. > * Change default PMU naming to "arm__pmu". > * Add implementor ops to generate custom name. > Thanks to suzuki.poulose@arm.com for the review comments. >=20 > Changes from v1: > * Remove CPU arch dependency. > * Remove 32-bit read/write helper function and just use read/writel. > * Add .is_visible into event attribute to filter out cycle counter event= . > * Update pmiidr matching. > * Remove read-modify-write on PMCR since the driver only writes to > PMCR.E. > * Assign default cycle event outside the 32-bit PMEVTYPER range. > * Rework the active event and used counter tracking. > Thanks to robin.murphy@arm.com for the review comments. >=20 > Besar Wicaksono (2): > perf: coresight_pmu: Add support for ARM CoreSight PMU driver > perf: coresight_pmu: Add support for NVIDIA SCF and MCF attribute >=20 > arch/arm64/configs/defconfig | 1 + > drivers/perf/Kconfig | 2 + > drivers/perf/Makefile | 1 + > drivers/perf/coresight_pmu/Kconfig | 11 + > drivers/perf/coresight_pmu/Makefile | 7 + > .../perf/coresight_pmu/arm_coresight_pmu.c | 1316 > +++++++++++++++++ > .../perf/coresight_pmu/arm_coresight_pmu.h | 177 +++ > .../coresight_pmu/arm_coresight_pmu_nvidia.c | 312 ++++ > .../coresight_pmu/arm_coresight_pmu_nvidia.h | 17 + > 9 files changed, 1844 insertions(+) > create mode 100644 drivers/perf/coresight_pmu/Kconfig > create mode 100644 drivers/perf/coresight_pmu/Makefile > create mode 100644 drivers/perf/coresight_pmu/arm_coresight_pmu.c > create mode 100644 drivers/perf/coresight_pmu/arm_coresight_pmu.h > create mode 100644 > drivers/perf/coresight_pmu/arm_coresight_pmu_nvidia.c > create mode 100644 > drivers/perf/coresight_pmu/arm_coresight_pmu_nvidia.h >=20 >=20 > base-commit: 09ce5091ff971cdbfd67ad84dc561ea27f10d67a > -- > 2.17.1