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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id ge7-20020a17090b0e0700b001e31c6b733csi18072013pjb.19.2022.06.05.22.56.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 05 Jun 2022 22:56:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id C342918E3C; Sun, 5 Jun 2022 21:45:28 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1348032AbiFEVrL (ORCPT + 99 others); Sun, 5 Jun 2022 17:47:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59222 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347933AbiFEVrK (ORCPT ); Sun, 5 Jun 2022 17:47:10 -0400 Received: from mail-qk1-f178.google.com (mail-qk1-f178.google.com [209.85.222.178]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0CFD110FA; Sun, 5 Jun 2022 14:47:05 -0700 (PDT) Received: by mail-qk1-f178.google.com with SMTP id a184so6197908qkg.5; Sun, 05 Jun 2022 14:47:05 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=eEvBqpfDNp1gDkv6Nzdk7QI2mfC3GLl4R5QP+lrMbvA=; b=BK+Dz9K9PX7OOh5HU+9u3ENGR+uIEOx0rSMGqOxtIXtt/wqgjiPJ8K73j3Ga/XoDji feCVVgEAZ3DIXmygMg3AE3j+z6lVL+zq4oSaeImbKCNsK3kh8retiKHglyUxiz9Bu6n9 sca42g3DeI5hKXdGAd7hhrbp/VIVJvR1dfdh4A+HTewpKSwr8u+5o2Emw94dZFTke4on lv2RKHUi96TgfEPmbJdRAfQhrtPo6c+fi1aJoolnWKYqXymaRXZ5qlaOkTCce5QXpvpl qDz011Eej1i2MBsr1mdwfXyWntU2e1UWBuH0hR2NIOBjGv3gqE4su1r+chSxNZ7DrLTk mL/A== X-Gm-Message-State: AOAM531OsWhlWqkUpPzIcKJVGnDHCq69Ppv14NUz2D3PTEOCfbX9t9mA w5dBI4Xk+dViEeKUd+kqhTqmNCjVDg== X-Received: by 2002:a37:315:0:b0:6a6:a90c:9072 with SMTP id 21-20020a370315000000b006a6a90c9072mr6703509qkd.256.1654465624964; Sun, 05 Jun 2022 14:47:04 -0700 (PDT) Received: from robh.at.kernel.org ([2607:fb90:ac97:ac63:b5fd:aa9:8d74:9989]) by smtp.gmail.com with ESMTPSA id u16-20020a05620a455000b006a6b1c11235sm3207461qkp.84.2022.06.05.14.47.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 05 Jun 2022 14:47:04 -0700 (PDT) Received: (nullmailer pid 3577933 invoked by uid 1000); Sun, 05 Jun 2022 21:47:00 -0000 Date: Sun, 5 Jun 2022 16:47:00 -0500 From: Rob Herring To: Potin Lai Cc: Brendan Higgins , Benjamin Herrenschmidt , Joel Stanley , Andrew Jeffery , Rayn Chen , Patrick Williams , Potin Lai , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/2] dt-bindings: aspeed-i2c: add properties for manual clock setting Message-ID: <20220605214700.GA3558088-robh@kernel.org> References: <20220601041512.21484-1-potin.lai.pt@gmail.com> <20220601041512.21484-3-potin.lai.pt@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220601041512.21484-3-potin.lai.pt@gmail.com> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,MAILING_LIST_MULTI, RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jun 01, 2022 at 12:15:12PM +0800, Potin Lai wrote: > Add following properties for manual tuning clock divisor and cycle of > hign/low pulse witdh. > > * aspeed,i2c-manual-clk: Enable aspeed i2c clock manual setting > * aspeed,i2c-base-clk-div: Base Clock divisor (tBaseClk) > * aspeed,i2c-clk-high-cycle: Cycles of clock-high pulse (tClkHigh) > * aspeed,i2c-clk-low-cycle: Cycles of clock-low pulse (tClkLow) > > Signed-off-by: Potin Lai > --- > .../devicetree/bindings/i2c/aspeed,i2c.yaml | 44 +++++++++++++++++++ > 1 file changed, 44 insertions(+) > > diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml > index ea643e6c3ef5..e2f67fe2aa0c 100644 > --- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml > +++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml > @@ -12,6 +12,28 @@ maintainers: > allOf: > - $ref: /schemas/i2c/i2c-controller.yaml# > > + - if: > + properties: > + compatible: > + const: st,stm32-uart stm32 uart? > + > + then: > + properties: > + aspeed,i2c-clk-high-cycle: > + maximum: 8 > + aspeed,i2c-clk-low-cycle: > + maximum: 8 > + > + - if: > + required: > + - aspeed,i2c-manual-clk > + > + then: > + required: > + - aspeed,i2c-base-clk-div > + - aspeed,i2c-clk-high-cycle > + - aspeed,i2c-clk-low-cycle 'dependencies' can better express this than an if/then. However, I think this should all be done in a common way. > + > properties: > compatible: > enum: > @@ -49,6 +71,28 @@ properties: > description: > states that there is another master active on this bus > > + aspeed,i2c-manual-clk: > + type: boolean > + description: enable manual clock setting No need for this as presence of the other properties can determine this. > + > + aspeed,i2c-base-clk-div: > + $ref: /schemas/types.yaml#/definitions/uint32 > + enum: [1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, > + 16384, 32768] > + description: base clock divisor Specify the i2c bus frequency and calculate the divider. > + > + aspeed,i2c-clk-high-cycle: > + $ref: /schemas/types.yaml#/definitions/uint32 > + minimum: 1 > + maximum: 16 > + description: cycles of master clock-high pulse width > + > + aspeed,i2c-clk-low-cycle: > + $ref: /schemas/types.yaml#/definitions/uint32 > + minimum: 1 > + maximum: 16 > + description: cycles of master clock-low pulse width These 2 should be common. I think you just need a single property expressing duty cycle. Rob