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From:   Huacai Chen <chenhuacai@kernel.org>
Date:   Sat, 4 Jun 2022 21:11:34 +0800
Message-ID: <CAAhV-H42rRE5w2qThfO3fEa8PZVfRQp-mzUqw8pWx1x2JYo9Pw@mail.gmail.com>
Subject: Re: [PATCH for-5.19 2/2] loongarch: Mask out higher bits for get_csr_cpuid
To:     Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc:     WANG Xuerui <kernel@xen0n.name>, Marc Zyngier <maz@kernel.org>,
        LKML <linux-kernel@vger.kernel.org>,
        "open list:MIPS" <linux-mips@vger.kernel.org>
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Hi, Jiaxun,

On Sat, Jun 4, 2022 at 8:41 PM Jiaxun Yang <jiaxun.yang@flygoat.com> wrote:
>
> Only low 9 bits of CPUID CSR represents coreid, higher bits
> are marked as reserved. In case Loongson may define higher
> bits in future, just mask them out for get_csr_cpuid.
I think we needn't to modify, until the high bits actually get defined. :)

Huacai

>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
>  arch/loongarch/include/asm/loongarch.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/include/asm/loongarch.h
> index 3ba4f7e87cd2..7f3933f747f9 100644
> --- a/arch/loongarch/include/asm/loongarch.h
> +++ b/arch/loongarch/include/asm/loongarch.h
> @@ -1200,7 +1200,7 @@ static inline u64 drdtime(void)
>
>  static inline unsigned int get_csr_cpuid(void)
>  {
> -       return csr_read32(LOONGARCH_CSR_CPUID);
> +       return csr_read32(LOONGARCH_CSR_CPUID) & CSR_CPUID_COREID;
>  }
>
>  static inline void csr_any_send(unsigned int addr, unsigned int data,
> --
> 2.25.1
>