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Date:   Wed, 8 Jun 2022 17:21:39 +0800
From:   Xu Yilun <yilun.xu@intel.com>
To:     Ivan Bornyakov <i.bornyakov@metrotek.ru>
Cc:     mdf@kernel.org, hao.wu@intel.com, trix@redhat.com,
        Conor.Dooley@microchip.com, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, linux-fpga@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        system@metrotek.ru, Rob Herring <robh@kernel.org>
Subject: Re: [PATCH v16 3/3] dt-bindings: fpga: add binding doc for
 microchip-spi fpga mgr
Message-ID: <20220608092139.GC481269@yilunxu-OptiPlex-7050>
References: <20220607111030.3003-1-i.bornyakov@metrotek.ru>
 <20220607111030.3003-4-i.bornyakov@metrotek.ru>
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On Tue, Jun 07, 2022 at 02:10:30PM +0300, Ivan Bornyakov wrote:
> Add Device Tree Binding doc for Microchip Polarfire FPGA Manager using
> slave SPI to load .dat formatted bitstream image.
> 
> Signed-off-by: Ivan Bornyakov <i.bornyakov@metrotek.ru>
> Reviewed-by: Rob Herring <robh@kernel.org>

Signed-off-by: Xu Yilun <yilun.xu@intel.com>

> ---
>  .../fpga/microchip,mpf-spi-fpga-mgr.yaml      | 44 +++++++++++++++++++
>  1 file changed, 44 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml
> 
> diff --git a/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml
> new file mode 100644
> index 000000000000..aee45cb15592
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml
> @@ -0,0 +1,44 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/fpga/microchip,mpf-spi-fpga-mgr.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip Polarfire FPGA manager.
> +
> +maintainers:
> +  - Ivan Bornyakov <i.bornyakov@metrotek.ru>
> +
> +description:
> +  Device Tree Bindings for Microchip Polarfire FPGA Manager using slave SPI to
> +  load the bitstream in .dat format.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - microchip,mpf-spi-fpga-mgr
> +
> +  reg:
> +    description: SPI chip select
> +    maxItems: 1
> +
> +  spi-max-frequency: true
> +
> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    spi {
> +            #address-cells = <1>;
> +            #size-cells = <0>;
> +
> +            fpga_mgr@0 {
> +                    compatible = "microchip,mpf-spi-fpga-mgr";
> +                    spi-max-frequency = <20000000>;
> +                    reg = <0>;
> +            };
> +    };
> -- 
> 2.35.1
>