Received: by 2002:a5d:9c59:0:0:0:0:0 with SMTP id 25csp2411496iof; Wed, 8 Jun 2022 04:33:05 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxD9w+5CmxWuEMxz4+VMq/HDoZdM1vxZZqhIZtUAsl+WXnC4GA7DziiTdutwfRQ69iQELJM X-Received: by 2002:a17:902:e804:b0:164:466:e488 with SMTP id u4-20020a170902e80400b001640466e488mr33933585plg.161.1654687985531; Wed, 08 Jun 2022 04:33:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1654687985; cv=none; d=google.com; s=arc-20160816; b=fFpgQi2Ynq1qddhWFktMHqvzMtG89nUXDG0B+a3A6M4PblIqZoG6pq9thc+7DXJAdE OSID7r3wkc8F6F0yJmHCa+yloaj/twHdZhRFRodN4iJebLhm0dIcAeli4+iS4P8/wxhc CHpBDtE4dI4qBDnpTRg+eNDYjf0Tn82zCcTeSncSdOfA6dBIJU32PSrK/laAa63A6Pan Sv8baLw/9wc5I5pXiWJ5QuiCNSktfWifsk+UU5q6jvuyb5h/sbJrrHiot1EHyf5SLWC2 Z2wbyGjHC1ZHX3vFSQf+O1jNoR9RdKUEmROVrdyDmM3b5/sIRSpiL4zblacWxf7YaOn8 Cdwg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:date:cc:to:from:subject :message-id; bh=WmVgZDdohq7wIiqxC3mc6mdkTI7v0qRFGC3htqsDY8o=; b=Y++5aDZH8WDK7ponaZ17mK7kJergxV/bWqQ/FPopcOravhgKjZGgiv6sQOac2NbUYZ cZuh7Z6QfC5d0JoJy1001o358TIteR1UYwlJIsZuylDTHziJLMJG4KFJrIoGUEXGmbYj Nv0rRl/3lH/jKqdF1N3bCNZERUJjrDmGcn/Z6AbRTf+loE0fYvKOTpOZjfZ56tsUFZ5+ SYmzBZsu3uAG4babYm0a/u7gNdvu8QEHH/SnZ4zozcR1NRq1m2HNjL+ae8jHOb565beH 2+xLt/37fwcatSZ9Wr1ZIORFcsvc0ViyQwl+So9hBDKIrZcSDlm/puNEkGRR1l1qFwZ8 Tnlw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net. [2620:137:e000::1:18]) by mx.google.com with ESMTPS id jd7-20020a170903260700b00162188be366si25928587plb.617.2022.06.08.04.33.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jun 2022 04:33:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id DBA9B15C8A6; Wed, 8 Jun 2022 03:57:22 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237709AbiFHK4y (ORCPT + 99 others); Wed, 8 Jun 2022 06:56:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46572 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236867AbiFHK4r (ORCPT ); Wed, 8 Jun 2022 06:56:47 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 37DA866CA3 for ; Wed, 8 Jun 2022 03:56:46 -0700 (PDT) Received: from gallifrey.ext.pengutronix.de ([2001:67c:670:201:5054:ff:fe8d:eefb] helo=[IPv6:::1]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1nytMi-0002sA-Fu; Wed, 08 Jun 2022 12:56:44 +0200 Message-ID: <2d79719b8670a3693b210af5ab45716dba23999a.camel@pengutronix.de> Subject: Re: [PATCH] irqchip/irq-imx-irqsteer: Get/put PM runtime in ->irq_unmask()/irq_mask() From: Lucas Stach To: Liu Ying , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Thomas Gleixner , Marc Zyngier , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Date: Wed, 08 Jun 2022 12:56:41 +0200 In-Reply-To: <20220608105057.2607812-1-victor.liu@nxp.com> References: <20220608105057.2607812-1-victor.liu@nxp.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.40.4 (3.40.4-1.fc34) MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 2001:67c:670:201:5054:ff:fe8d:eefb X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RDNS_NONE, SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Mittwoch, dem 08.06.2022 um 18:50 +0800 schrieb Liu Ying: > Now that runtime PM support was added in this driver, we have > to enable power before accessing irqchip registers. And, after > the access is done, we should disable power. This patch calls > pm_runtime_get_sync() in ->irq_unmask() and pm_runtime_put() in > ->irq_mask() to make sure power is managed for the register access. > Can you tell me in which case this is necessary? IIRC the IRQ core already keeps the chip runtime resumed as soon as a IRQ is requested, so why would it be in runtime suspend at mask/unmask? Regards, Lucas > Fixes: 4730d2233311 ("irqchip/imx-irqsteer: Add runtime PM support") > Cc: Thomas Gleixner > Cc: Marc Zyngier > Cc: Shawn Guo > Cc: Sascha Hauer > Cc: Pengutronix Kernel Team > Cc: Fabio Estevam > Cc: NXP Linux Team > Cc: Lucas Stach > Signed-off-by: Liu Ying > --- > drivers/irqchip/irq-imx-irqsteer.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/irqchip/irq-imx-irqsteer.c b/drivers/irqchip/irq-imx-irqsteer.c > index 96230a04ec23..a5eabe71e8ab 100644 > --- a/drivers/irqchip/irq-imx-irqsteer.c > +++ b/drivers/irqchip/irq-imx-irqsteer.c > @@ -45,11 +45,14 @@ static int imx_irqsteer_get_reg_index(struct irqsteer_data *data, > > static void imx_irqsteer_irq_unmask(struct irq_data *d) > { > + struct device *dev = d->domain->dev; > struct irqsteer_data *data = d->chip_data; > int idx = imx_irqsteer_get_reg_index(data, d->hwirq); > unsigned long flags; > u32 val; > > + pm_runtime_get_sync(dev); > + > raw_spin_lock_irqsave(&data->lock, flags); > val = readl_relaxed(data->regs + CHANMASK(idx, data->reg_num)); > val |= BIT(d->hwirq % 32); > @@ -59,6 +62,7 @@ static void imx_irqsteer_irq_unmask(struct irq_data *d) > > static void imx_irqsteer_irq_mask(struct irq_data *d) > { > + struct device *dev = d->domain->dev; > struct irqsteer_data *data = d->chip_data; > int idx = imx_irqsteer_get_reg_index(data, d->hwirq); > unsigned long flags; > @@ -69,6 +73,8 @@ static void imx_irqsteer_irq_mask(struct irq_data *d) > val &= ~BIT(d->hwirq % 32); > writel_relaxed(val, data->regs + CHANMASK(idx, data->reg_num)); > raw_spin_unlock_irqrestore(&data->lock, flags); > + > + pm_runtime_put(dev); > } > > static const struct irq_chip imx_irqsteer_irq_chip = {