Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
From:   Liu Ying <victor.liu@nxp.com>
To:     dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        linux-media@vger.kernel.org
Cc:     andrzej.hajda@intel.com, narmstrong@baylibre.com,
        robert.foss@linaro.org, Laurent.pinchart@ideasonboard.com,
        jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@linux.ie,
        daniel@ffwll.ch, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org,
        s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com,
        linux-imx@nxp.com, lee.jones@linaro.org, mchehab@kernel.org,
        marcel.ziswiler@toradex.com, Rob Herring <robh@kernel.org>
Subject: [PATCH v8 05/14] dt-bindings: display: bridge: Add i.MX8qm/qxp display pixel link binding
Date:   Thu,  9 Jun 2022 14:49:22 +0800
Message-Id: <20220609064931.3068601-6-victor.liu@nxp.com>
In-Reply-To: <20220609064931.3068601-1-victor.liu@nxp.com>
References: <20220609064931.3068601-1-victor.liu@nxp.com>
Content-Transfer-Encoding: 8bit
Content-Type: text/plain
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?no6+aKu4kxu+hG4o/OJhM1vhitFYAN7iXnYhEsrwCv+3ztlMno/b/eoq3K7A?=
 =?us-ascii?Q?DXG79MGDFO9aVPOdLcGMqVQIktxp+4nmOIcjc7kWL4HHI1jmlM29PINwbmcX?=
 =?us-ascii?Q?AMe2AT/syN1lJky4cW6zZ9DH44p98hecj1UrTYHvLKm8S+ia6PYIZ/IY6JYc?=
 =?us-ascii?Q?IrOx8CnTlWtBJvR3WbZMyMoUTiFzKrXzhaiDmDIwERWxjHaelWBgt7IHyo5v?=
 =?us-ascii?Q?ZzoljLS8BbzYtIFEfn6FW2JDsdLOEEiGh62nSKNkAtz6t+YCw9T4GNGceGlg?=
 =?us-ascii?Q?IpxGd7yzE+B/oNTdJ73xDIuHPI0cHiNvqnbbcTLQO8QF2H8SOrj5bN5me2O3?=
 =?us-ascii?Q?Ms2ZP3kTrrqlqrILRpAiOCT92Z5FkhafDL/f8h/rQWRSBWgyD+TKsWjJPvFO?=
 =?us-ascii?Q?4wmoSXR5y4qSyQ/LHny4ZYWtbPp0Ke60A6TTBNns6xWigAQbCCTaU2LXwiBI?=
 =?us-ascii?Q?IXEA7Y6+pTDAyauU2M0eLM7H9lpxpEknn3EoNi7wCvpdDYQ8ovCTxj9BRm2Y?=
 =?us-ascii?Q?HWGw0OO2A2DiAAIHlvfIyp9nGs8jvtp9tsFen2k34PUIy//SohfwRyIYpN09?=
 =?us-ascii?Q?NluAp0U3QZo5kQAjM3f8pCJzZVpRLBGYuMUIp6Pq+wf6JAxgrHJQN7IpRtGG?=
 =?us-ascii?Q?LZm+tkwyI2Y9zh//NZRVEt1RjPlkLmEzeNbvdqEznOG+YdCgN/Hvm9XfzT6M?=
 =?us-ascii?Q?Lijkdr5CpcMl2ISbd2KuuKtt8eKwJzLlAeIPVQwuwomWbdPWC1tBcVrOSlAv?=
 =?us-ascii?Q?g5z/dHYCPuWZfFns5qhTnLUS5yseIONgyddsPZTHy6NupLrjHq6r2Im1y2xx?=
 =?us-ascii?Q?VnVBc4w95LucS176ZLdBeJCdvzn2mYzvjNfU1u/8vEXlleVGqRM3N+MfUnVO?=
 =?us-ascii?Q?4946gfPExMy9lVNIPQqs20wl6/ems9zuP+D7WGDDzpHqdyKf63NiIibI8Hz+?=
 =?us-ascii?Q?p8U+bCtA8hrtrYiuBrRjxBU57KUrleteg14xQkH+J74yUk8TfsLKAYIRbMqI?=
 =?us-ascii?Q?mcSEIDytgoEbfJeMzyzSypvgYZpPLUXBlTFWn5MS5j+/7aLXgn7dv0kSnt47?=
 =?us-ascii?Q?7ElKEBFIREmvtSScCwDFmPuhTr8iuN3qFaKycLBpvT6s6EXeAtgpicoD1wzA?=
 =?us-ascii?Q?hWxN5Q0Jnwn6pXFKvfnKnJVNKp+/hhqRY3UJRn8OB4HxVstUiOnYy9uagBny?=
 =?us-ascii?Q?1aIiNJYCVzv3xns+xXHVycr+4+gWzwmwIeYfadaSjlTqBPhi4/rP2R4Vf/M0?=
 =?us-ascii?Q?wrbW5L5k225m74D20GyLfUKWxTHIFiv15LMDMcVI8CZh78xiT/oB/1WTwKcB?=
 =?us-ascii?Q?QRGld27R6IUlxS0gil+pE3PlPwU5GfBVhJsgPHshYQJJbQAESWCEX1MwfjNL?=
 =?us-ascii?Q?H+DNBaPSnntOg+FixM8eBns89pjsrBtWFf+woYwFjmJm9Mhjybn3NN8Tgjh0?=
 =?us-ascii?Q?tpju9dhbRYFd+nXpUVlWVJjE9OLeHclqyw8lzUS32eVPs/3LGUkPTR5qEtD4?=
 =?us-ascii?Q?EsG2d06ZzlqrridmH/GgiK9AxoTVOtiqHCxEHHqXewQJeQr/9I4kVvwM8KZ7?=
 =?us-ascii?Q?2LXbIAaBe5Yzcsi40/bmonFAqVRJT3HJTxsyv5ifHnVKoq/ERKitWeP6Jaoh?=
 =?us-ascii?Q?uZTnZ9/OU4jv4OSMMmuN4/tWNk3CmoC/L4V659RVfPDLsAf9JTT9+OFEsGDi?=
 =?us-ascii?Q?OLxak8cM5OZ3Z4to/WAXN/p1h7bazf3BMmDjFNz0PB6A8w6D+OfSYU96FE20?=
 =?us-ascii?Q?nUDklVPsPA=3D=3D?=
X-OriginatorOrg: nxp.com
X-MS-Exchange-CrossTenant-Network-Message-Id: 301c3304-93c3-46ed-06c8-08da49e41510
X-MS-Exchange-CrossTenant-AuthSource: AM7PR04MB7046.eurprd04.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Jun 2022 06:48:38.4526
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: CsczIer9RZhlZWqlYmNbpDMd4NAssyaZ2Whk+zPnjNqlt6qQVao6dqIt4+Ib8nvVpd2IqzJGjnqdus3lmim0tw==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0402MB3518
X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,
        DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE,
        RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,
        URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6
X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on
        lindbergh.monkeyblade.net
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

This patch adds bindings for i.MX8qm/qxp display pixel link.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
---
v7->v8:
* No change.

v6->v7:
* No change.

v5->v6:
* No change.

v4->v5:
* No change.

v3->v4:
* No change.

v2->v3:
* Add Rob's R-b tag.

v1->v2:
* Use graph schema. (Laurent)
* Require all four pixel link output ports. (Laurent)
* Mention pixel link is accessed via SCU firmware. (Rob)

 .../bridge/fsl,imx8qxp-pixel-link.yaml        | 106 ++++++++++++++++++
 1 file changed, 106 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml

diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml
new file mode 100644
index 000000000000..3af67ccf8db1
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml
@@ -0,0 +1,106 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX8qm/qxp Display Pixel Link
+
+maintainers:
+  - Liu Ying <victor.liu@nxp.com>
+
+description: |
+  The Freescale i.MX8qm/qxp Display Pixel Link(DPL) forms a standard
+  asynchronous linkage between pixel sources(display controller or
+  camera module) and pixel consumers(imaging or displays).
+  It consists of two distinct functions, a pixel transfer function and a
+  control interface.  Multiple pixel channels can exist per one control channel.
+  This binding documentation is only for pixel links whose pixel sources are
+  display controllers.
+
+  The i.MX8qm/qxp Display Pixel Link is accessed via System Controller Unit(SCU)
+  firmware.
+
+properties:
+  compatible:
+    enum:
+      - fsl,imx8qm-dc-pixel-link
+      - fsl,imx8qxp-dc-pixel-link
+
+  ports:
+    $ref: /schemas/graph.yaml#/properties/ports
+
+    properties:
+      port@0:
+        $ref: /schemas/graph.yaml#/properties/port
+        description: The pixel link input port node from upstream video source.
+
+    patternProperties:
+      "^port@[1-4]$":
+        $ref: /schemas/graph.yaml#/properties/port
+        description: The pixel link output port node to downstream bridge.
+
+    required:
+      - port@0
+      - port@1
+      - port@2
+      - port@3
+      - port@4
+
+required:
+  - compatible
+  - ports
+
+additionalProperties: false
+
+examples:
+  - |
+    dc0-pixel-link0 {
+        compatible = "fsl,imx8qxp-dc-pixel-link";
+
+        ports {
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            /* from dc0 pixel combiner channel0 */
+            port@0 {
+                reg = <0>;
+
+                dc0_pixel_link0_dc0_pixel_combiner_ch0: endpoint {
+                    remote-endpoint = <&dc0_pixel_combiner_ch0_dc0_pixel_link0>;
+                };
+            };
+
+            /* to PXL2DPIs in MIPI/LVDS combo subsystems */
+            port@1 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <1>;
+
+                dc0_pixel_link0_mipi_lvds_0_pxl2dpi: endpoint@0 {
+                    reg = <0>;
+                    remote-endpoint = <&mipi_lvds_0_pxl2dpi_dc0_pixel_link0>;
+                };
+
+                dc0_pixel_link0_mipi_lvds_1_pxl2dpi: endpoint@1 {
+                    reg = <1>;
+                    remote-endpoint = <&mipi_lvds_1_pxl2dpi_dc0_pixel_link0>;
+                };
+            };
+
+            /* unused */
+            port@2 {
+                reg = <2>;
+            };
+
+            /* unused */
+            port@3 {
+                reg = <3>;
+            };
+
+            /* to imaging subsystem */
+            port@4 {
+                reg = <4>;
+            };
+        };
+    };
-- 
2.25.1