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Date:   Thu, 9 Jun 2022 11:14:18 +0100
From:   Mark Brown <broonie@kernel.org>
To:     "Zhang, Tianfei" <tianfei.zhang@intel.com>
Cc:     "matthew.gerlach@linux.intel.com" <matthew.gerlach@linux.intel.com>,
        "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
        "rafael@kernel.org" <rafael@kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "Wu, Hao" <hao.wu@intel.com>, "trix@redhat.com" <trix@redhat.com>,
        "Xu, Yilun" <yilun.xu@intel.com>,
        "Weight, Russell H" <russell.h.weight@intel.com>
Subject: Re: [PATCH v1] regmap: add generic indirect regmap support
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On Wed, Jun 08, 2022 at 11:54:26PM +0000, Zhang, Tianfei wrote:

> > > Would a different name help?
> >=20
> > This wouldn't address the major problem which is...
> >=20
> > > > > +	writel(0, ctx->base + INDIRECT_CMD_OFF);
> > > > > +	ret =3D readl_poll_timeout((ctx->base + INDIRECT_CMD_OFF), cmd,
> > > > > +				 (!cmd), INDIRECT_INT_US,
> > INDIRECT_TIMEOUT_US);
> > > > > +	if (ret)
> > > > > +		dev_err(ctx->dev, "%s timed out on clearing cmd 0x%xn",
> > > > > +__func__, cmd);
> >=20
> > > > ...and this doesn't look particularly generic, it looks like it's
> > > > for some particular controller/bridge?
> >=20
> > ...that this appears to be entirely specific to some particular device,=
 it's got
> > things like hard coded register addresses and timeouts which mean it ca=
n't be
> > reused.
>=20
> Yet, this is a register access hardware controller/bridge widely used in =
FPGA IP blocks, like PMCI, HSSI.
> How about we change the patch title like this:

> regmap: add indirect register controller support

No, please enage with my feedback above.

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