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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: CO1PR11MB4865.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 2e2f8f24-7b47-4ee9-5e98-08da4a1cd2bc X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Jun 2022 13:34:48.0965 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3f4057f3-b418-4d4e-ba84-d55b4e897d88 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: asT1HpOi36+jhgRwxPhgaBe9OpjP6K6RPWIj+kaaAXd8k5QITt48JDeHlt6TZcPIHStODgphCz1fefkaU1rafn5Z7BZs4BOEfKEbxlcnYHQTY8Gw/bi5wpaARkoD7jxe X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR1101MB2109 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >>>>> LAN966x SoC have 5 flexcoms. Each flexcom has 2 chip-selects. >>>>> For each chip select of each flexcom there is a configuration >>>>> register FLEXCOM_SHARED[0-4]:SS_MASK[0-1]. The width of >>>>> configuration register is 21 because there are 21 shared pins >>>>> on each of which the chip select can be mapped. Each bit of the >>>>> register represents a different FLEXCOM_SHARED pin. >>>>> Signed-off-by: Kavyasree Kotagiri >>>>> --- >>>>> v1 -> v2: >>>>> - use GENMASK for mask, macros for maximum allowed values. >>>>> - use u32 values for flexcom chipselects instead of strings. >>>>> - disable clock in case of errors. >>>>> drivers/mfd/atmel-flexcom.c | 93 >>>> ++++++++++++++++++++++++++++++++++++- >>>>> 1 file changed, 92 insertions(+), 1 deletion(-) >>>>> diff --git a/drivers/mfd/atmel-flexcom.c b/drivers/mfd/atmel-flexcom.= c >>>>> index 33caa4fba6af..ac700a85b46f 100644 >>>>> --- a/drivers/mfd/atmel-flexcom.c >>>>> +++ b/drivers/mfd/atmel-flexcom.c >>>>> @@ -28,15 +28,68 @@ >>>>> #define FLEX_MR_OPMODE(opmode) (((opmode) << >>>> FLEX_MR_OPMODE_OFFSET) & \ >>>>> FLEX_MR_OPMODE_MASK) >>>>> +/* LAN966x flexcom shared register offsets */ >>>>> +#define FLEX_SHRD_SS_MASK_0 0x0 >>>>> +#define FLEX_SHRD_SS_MASK_1 0x4 >>>>> +#define FLEX_SHRD_PIN_MAX 20 >>>>> +#define FLEX_CS_MAX 1 >>>>> +#define FLEX_SHRD_MASK GENMASK(20, 0) >>>>> + >>>>> +struct atmel_flex_caps { >>>>> + bool has_flx_cs; >>>>> +}; >>>>> + >>>>> struct atmel_flexcom { >>>>> void __iomem *base; >>>>> + void __iomem *flexcom_shared_base; >>>>> u32 opmode; >>>>> struct clk *clk; >>>>> }; >>>>> +static int atmel_flexcom_lan966x_cs_config(struct platform_device >> *pdev) >>>>> +{ >>>>> + struct atmel_flexcom *ddata =3D dev_get_drvdata(&pdev->dev); >>>>> + struct device_node *np =3D pdev->dev.of_node; >>>>> + u32 flx_shrd_pins[2], flx_cs[2], val; >>>>> + int err, i, count; >>>>> + >>>>> + count =3D of_property_count_u32_elems(np, "microchip,flx-shrd- >>>> pins"); >>>>> + if (count <=3D 0 || count > 2) { >>>>> + dev_err(&pdev->dev, "Invalid %s property (%d)\n", "flx-shrd- >>>> pins", >>>>> + count); >>>>> + return -EINVAL; >>>>> + } >>>>> + >>>>> + err =3D of_property_read_u32_array(np, "microchip,flx-shrd-pins"= , >>>> flx_shrd_pins, count); >>>>> + if (err) >>>>> + return err; >>>>> + >>>>> + err =3D of_property_read_u32_array(np, "microchip,flx-cs", flx_c= s, >>>> count); >>>>> + if (err) >>>>> + return err; >>>>> + >>>>> + for (i =3D 0; i < count; i++) { >>>>> + if (flx_shrd_pins[i] > FLEX_SHRD_PIN_MAX) >>>>> + return -EINVAL; >>>>> + >>>>> + if (flx_cs[i] > FLEX_CS_MAX) >>>>> + return -EINVAL; >>>>> + >>>>> + val =3D ~(1 << flx_shrd_pins[i]) & FLEX_SHRD_MASK; >>>>> + >>>>> + if (flx_cs[i] =3D=3D 0) >>>>> + writel(val, ddata->flexcom_shared_base + >>>> FLEX_SHRD_SS_MASK_0); >>>>> + else >>>>> + writel(val, ddata->flexcom_shared_base + >>>> FLEX_SHRD_SS_MASK_1); >>>> There is still an open question on this topic from previous version. >>> https://lore.kernel.org/linux-arm- >> kernel/PH0PR11MB48724DE09A50D67F1EA9FBE092D89@PH0PR11MB4872.n >> amprd11.prod.outlook.com/ >> "previous version" meant for me this the one at [1]... Another point tha= t >> the versioning of this series is bad. >> The question was the following: >> "I may miss something but I don't see here the approach you introduced i= n >> [1]: >> + err =3D mux_control_select(flx_mux, args.args[0]); >> + if (!err) { >> + mux_control_deselect(flx_mux); >> " >> As I had in mind that you said you need mux_control_deselect() because >> your >> serial remain blocked otherwise (but I don't find that in the comments o= f >> [1]). And I don't see something similar to mux_control_deselect() being >> called in this patch. >> [1] >> https://lore.kernel.org/linux-arm-kernel/5f9fcc33-cc0f-c404-cf7f- >> cb73f60154ff@microchip.com/ >>> As part of comments from Peter Rosin - Instead of using mux driver, Thi= s >> patch is introducing >>> new dt-properties in atmel-flexom driver itlself to configure Flexcom >> shared registers. >>> Based on the chip-select(0 or 1) to be mapped to flexcom shared pin, wr= ite >> to the >>> respective register. >>> If you still have any questions, please comment. > https://lore.kernel.org/linux-arm-kernel/PH0PR11MB48724DE09A50D67F1EA9FBE= 092D89@PH0PR11MB4872.namprd11.prod.outlook.com/ > To avoid confusion, I stopped continuing with above patch versioning(mux = driver approach). > I started new patch series in which I am configuring FLEXCOM_SHARED[0-4]:= SS_MASK[0-1] > registers in atmel-flexcom.c driver using new DT-properties, mux driver a= pproach is no more followed > as suggested by Peter Rosin: > " >> If you are content with just programming a fixed set of values to >> a couple of registers depending on how the board is wired, some >> extra DT property on some node related to the flexcom seems like >> a better fit than a mux driver. > Based on your inputs, I planned to send a new patch with new DT propertie= s > introduced in atmel-flexcom.c driver rather than mux driver. >=20 > Thanks, > Kavya > " >=20 > Thanks, > Kavya Hi Claudiu, Please let me know if you still have any comments. If not, I will send my v= 3 with clk_disable_unprepare moved to goto and some minor fixes(irq flags) = in dt-bindings. >>>>> + } >>>>> + >>>>> + return 0; >>>>> +} >>>>> + >>>>> static int atmel_flexcom_probe(struct platform_device *pdev) >>>>> { >>>>> struct device_node *np =3D pdev->dev.of_node; >>>>> + const struct atmel_flex_caps *caps; >>>>> struct resource *res; >>>>> struct atmel_flexcom *ddata; >>>>> int err; >>>>> @@ -76,13 +129,51 @@ static int atmel_flexcom_probe(struct >>>> platform_device *pdev) >>>>> */ >>>>> writel(FLEX_MR_OPMODE(ddata->opmode), ddata->base + >>>> FLEX_MR); >>>>> + caps =3D of_device_get_match_data(&pdev->dev); >>>>> + if (!caps) { >>>>> + dev_err(&pdev->dev, "Could not retrieve flexcom caps\n"); >>>>> + clk_disable_unprepare(ddata->clk); >>>> Could you keep a common path to disable the clock? A goto label >> something >>>> like this: >>>> ret =3D -EINVAL; >>>> got clk_disable_unprepare; >>>>> + return -EINVAL; >>>>> + } >>>>> + >>>>> + if (caps->has_flx_cs) { >>>>> + ddata->flexcom_shared_base =3D >>>> devm_platform_get_and_ioremap_resource(pdev, 1, NULL); >>>>> + if (IS_ERR(ddata->flexcom_shared_base)) { >>>>> + clk_disable_unprepare(ddata->clk); >>>>> + return dev_err_probe(&pdev->dev, >>>>> + PTR_ERR(ddata- >>>>> flexcom_shared_base), >>>>> + "failed to get flexcom shared base >>>> address\n"); >>>> ret =3D dev_err_probe(...); >>>> goto clk_disable_unprepare; >>>>> + } >>>>> + >>>>> + err =3D atmel_flexcom_lan966x_cs_config(pdev); >>>>> + if (err) { >>>>> + clk_disable_unprepare(ddata->clk); >>>>> + return err; >>>> goto clk_disable_unprepare; >>>>> + } >>>>> + } >>>>> + >>>> clk_unprepare: >>>>> clk_disable_unprepare(ddata->clk); >>>> if (ret) >>>> return ret; >>>>> return devm_of_platform_populate(&pdev->dev); >>>>> } >>>>> +static const struct atmel_flex_caps atmel_flexcom_caps =3D {}; >>>>> + >>>>> +static const struct atmel_flex_caps lan966x_flexcom_caps =3D { >>>>> + .has_flx_cs =3D true, >>>>> +}; >>>>> + >>>>> static const struct of_device_id atmel_flexcom_of_match[] =3D { >>>>> - { .compatible =3D "atmel,sama5d2-flexcom" }, >>>>> + { >>>>> + .compatible =3D "atmel,sama5d2-flexcom", >>>>> + .data =3D &atmel_flexcom_caps, >>>>> + }, >>>>> + >>>>> + { >>>>> + .compatible =3D "microchip,lan966x-flexcom", >>>>> + .data =3D &lan966x_flexcom_caps, >>>>> + }, >>>>> + >>>>> { /* sentinel */ } >>>>> }; >>>>> MODULE_DEVICE_TABLE(of, atmel_flexcom_of_match);