Received: by 2002:a5d:925a:0:0:0:0:0 with SMTP id e26csp1066397iol; Thu, 9 Jun 2022 22:36:26 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyhUz146IvU2lrnZPybeh8UDmIzL413jEnxif6u4lMHn7fEBVIIP0Kfey4a29eNPYRkmRs7 X-Received: by 2002:a17:906:ae92:b0:711:2b64:c829 with SMTP id md18-20020a170906ae9200b007112b64c829mr28003145ejb.89.1654839385713; Thu, 09 Jun 2022 22:36:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1654839385; cv=none; d=google.com; s=arc-20160816; b=lCFLuO70huFxlCV4cQFnGZKJI7QvnwLC3kVkz+O5a1avlmNm+YP64PeqExZZbibWr/ uo9hl7opgFYyTaVL/iWmCclCYZlbXLWgDBdV4fappr5/QbZ3Ktl9f+4b6w7QNhxJ40Gk zxR8e/PB8lyVZUFj/kw9S72QTS4AcFFM1tKn/j0TzNND1CgELFxNZYrmVFyK1YgExdTx KdVlcOMWOI3PurJNNoS0MF7i3ZUIt54/Pe/osWVG8fqQmcputJ7pqf/xhgj6B1z9DJGk umryHc3GPCQbN0+mERieQsPL6DLd0nREvsTUdeajyo5r6soLbbgU4FgedbAtWZYKUFwl Rvrg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ULPEiXMnFU7l6XselUzEmxUGI/TXFOKAnllM+GAyEtM=; b=QcLrB+sOHr8+LR8iRnRZBT2xgaIKpWF/j/EntZOszJPQTqvt+U/QvQ5kELvDmxojid IDmlGhOq1rKJS2US9vjHeZYhylkY3Qa/kCtDQY1J8lwO3hWA0Zc/qcjoIhl/Hr7QLHjX +i9Np2JfLjHfVyNj732Lk3uy/skJiQ5teRSIpDvEnMxHdleAlVRteFgJVVnHUKXWY/2X h2bSYwGHjxSF7VaSNhQ9D6F4rSslOTXRTC912FpCqYsTZ8WFzl8R2KYBgT0isKW391+H ZLEp4vs6nBx+Rw80iyRDL0IGJ7REM/cQbWqW44A3GT1KyojNKAjIPTPIy8GEkb2vtTig +6/g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=C80BPXGa; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id f16-20020aa7d850000000b0042df7a955basi25993334eds.184.2022.06.09.22.35.59; Thu, 09 Jun 2022 22:36:25 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=C80BPXGa; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243492AbiFJFGj (ORCPT + 99 others); Fri, 10 Jun 2022 01:06:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40188 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242349AbiFJFGh (ORCPT ); Fri, 10 Jun 2022 01:06:37 -0400 Received: from mail-pg1-x532.google.com (mail-pg1-x532.google.com [IPv6:2607:f8b0:4864:20::532]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 89EE0256972 for ; Thu, 9 Jun 2022 22:06:27 -0700 (PDT) Received: by mail-pg1-x532.google.com with SMTP id e66so23746235pgc.8 for ; Thu, 09 Jun 2022 22:06:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ULPEiXMnFU7l6XselUzEmxUGI/TXFOKAnllM+GAyEtM=; b=C80BPXGalQYbDk/yHa5kUa+rgnL897bCITP0/Yl1pRCEmHFQ5y7eSiws3uouxLjyhf fOAmIidz0WVMC0m4UnivgGbTxLeINhT+qn4SihRoI9EWPvVUXeF36//GzCgYt4wKrK34 RPjfuMXXtQSLMGv1W22Mb05ZAeW/qRLqvgUK8lwFnrIlSw1QRJsEHPakq8GJAaGI1AEr ER2ra1gswhj/rWVgvWfrQ7O+S01pP5MIO1yenDdDR4T6pmB9lG3M8cnr91VFw01uydth U2L/eXdLvrwIBGCj1XOkqGRpUo4DxiodnVGJlDK+E+NsmvcpkbEuFKh+k1TDcSaNLbEt gvvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ULPEiXMnFU7l6XselUzEmxUGI/TXFOKAnllM+GAyEtM=; b=F33IwvoYUb6eSzk0LK+F8W9wbOQsOclhH9MCgvpOHTvlvZw5XGfzufH9eJG7Rly9dT ZNngNSLYQthu0/J9NEW0hTi7wRzdN9CbhKURSQGKpTF2i9Ds15WkhOlw78gyUkfxPnDJ ArKyVaup/9Q0lC6x/DPjABeqcYj6VcM5olzcAbmUlLvDaNSkKHC7oI0p5cmpH2vvSeUN HvWz6kr6H6DSgjOpIz4kyTyHLtRx3LN4uRqW/i8fKKMLEBMSFtzlzP13V1jFwUoAM5Gw Skg7qw2rTbqF9U5C1dvaihMpSU9VhnkY8Dn+C46sSBk9Mi33drPpnZRBM3QNPjGBl0Il MFFg== X-Gm-Message-State: AOAM530ewMANI5TUHnSFEzAL3QsbIuKHclAI2TXQhknRrmTqhWcfu1su bPXx7BFm0bqq7/u53dv1OGpzLQ== X-Received: by 2002:aa7:88cb:0:b0:51c:2627:2c03 with SMTP id k11-20020aa788cb000000b0051c26272c03mr22840484pff.63.1654837586673; Thu, 09 Jun 2022 22:06:26 -0700 (PDT) Received: from anup-ubuntu64-vm.. ([106.200.250.139]) by smtp.gmail.com with ESMTPSA id u7-20020a056a00158700b00519cfca8e30sm12429424pfk.209.2022.06.09.22.06.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Jun 2022 22:06:26 -0700 (PDT) From: Anup Patel To: Paolo Bonzini , Atish Patra Cc: Palmer Dabbelt , Paul Walmsley , Alistair Francis , Anup Patel , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel Subject: [PATCH 2/3] RISC-V: KVM: Add extensible system instruction emulation framework Date: Fri, 10 Jun 2022 10:35:54 +0530 Message-Id: <20220610050555.288251-3-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220610050555.288251-1-apatel@ventanamicro.com> References: <20220610050555.288251-1-apatel@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.6 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_WEB,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We will be emulating more system instructions in near future with upcoming AIA, PMU, Nested and other virtualization features. To accommodate above, we add an extensible system instruction emulation framework in vcpu_insn.c. Signed-off-by: Anup Patel --- arch/riscv/include/asm/kvm_vcpu_insn.h | 9 +++ arch/riscv/kvm/vcpu_insn.c | 82 +++++++++++++++++++++++--- 2 files changed, 82 insertions(+), 9 deletions(-) diff --git a/arch/riscv/include/asm/kvm_vcpu_insn.h b/arch/riscv/include/asm/kvm_vcpu_insn.h index 4e3ba4e84d0f..3351eb61a251 100644 --- a/arch/riscv/include/asm/kvm_vcpu_insn.h +++ b/arch/riscv/include/asm/kvm_vcpu_insn.h @@ -18,6 +18,15 @@ struct kvm_mmio_decode { int return_handled; }; +/* Return values used by function emulating a particular instruction */ +enum kvm_insn_return { + KVM_INSN_EXIT_TO_USER_SPACE = 0, + KVM_INSN_CONTINUE_NEXT_SEPC, + KVM_INSN_CONTINUE_SAME_SEPC, + KVM_INSN_ILLEGAL_TRAP, + KVM_INSN_VIRTUAL_TRAP +}; + void kvm_riscv_vcpu_wfi(struct kvm_vcpu *vcpu); int kvm_riscv_vcpu_virtual_insn(struct kvm_vcpu *vcpu, struct kvm_run *run, struct kvm_cpu_trap *trap); diff --git a/arch/riscv/kvm/vcpu_insn.c b/arch/riscv/kvm/vcpu_insn.c index be756879c2ee..75ca62a7fba5 100644 --- a/arch/riscv/kvm/vcpu_insn.c +++ b/arch/riscv/kvm/vcpu_insn.c @@ -118,8 +118,24 @@ (s32)(((insn) >> 7) & 0x1f)) #define MASK_FUNCT3 0x7000 -static int truly_illegal_insn(struct kvm_vcpu *vcpu, - struct kvm_run *run, +struct insn_func { + unsigned long mask; + unsigned long match; + /* + * Possible return values are as follows: + * 1) Returns < 0 for error case + * 2) Returns 0 for exit to user-space + * 3) Returns 1 to continue with next sepc + * 4) Returns 2 to continue with same sepc + * 5) Returns 3 to inject illegal instruction trap and continue + * 6) Returns 4 to inject virtual instruction trap and continue + * + * Use enum kvm_insn_return for return values + */ + int (*func)(struct kvm_vcpu *vcpu, struct kvm_run *run, ulong insn); +}; + +static int truly_illegal_insn(struct kvm_vcpu *vcpu, struct kvm_run *run, ulong insn) { struct kvm_cpu_trap utrap = { 0 }; @@ -128,6 +144,24 @@ static int truly_illegal_insn(struct kvm_vcpu *vcpu, utrap.sepc = vcpu->arch.guest_context.sepc; utrap.scause = EXC_INST_ILLEGAL; utrap.stval = insn; + utrap.htval = 0; + utrap.htinst = 0; + kvm_riscv_vcpu_trap_redirect(vcpu, &utrap); + + return 1; +} + +static int truly_virtual_insn(struct kvm_vcpu *vcpu, struct kvm_run *run, + ulong insn) +{ + struct kvm_cpu_trap utrap = { 0 }; + + /* Redirect trap to Guest VCPU */ + utrap.sepc = vcpu->arch.guest_context.sepc; + utrap.scause = EXC_VIRTUAL_INST_FAULT; + utrap.stval = insn; + utrap.htval = 0; + utrap.htinst = 0; kvm_riscv_vcpu_trap_redirect(vcpu, &utrap); return 1; @@ -148,18 +182,48 @@ void kvm_riscv_vcpu_wfi(struct kvm_vcpu *vcpu) } } -static int system_opcode_insn(struct kvm_vcpu *vcpu, - struct kvm_run *run, +static int wfi_insn(struct kvm_vcpu *vcpu, struct kvm_run *run, ulong insn) +{ + vcpu->stat.wfi_exit_stat++; + kvm_riscv_vcpu_wfi(vcpu); + return KVM_INSN_CONTINUE_NEXT_SEPC; +} + +static const struct insn_func system_opcode_funcs[] = { + { + .mask = INSN_MASK_WFI, + .match = INSN_MATCH_WFI, + .func = wfi_insn, + }, +}; + +static int system_opcode_insn(struct kvm_vcpu *vcpu, struct kvm_run *run, ulong insn) { - if ((insn & INSN_MASK_WFI) == INSN_MATCH_WFI) { - vcpu->stat.wfi_exit_stat++; - kvm_riscv_vcpu_wfi(vcpu); + int i, rc = KVM_INSN_ILLEGAL_TRAP; + const struct insn_func *ifn; + + for (i = 0; i < ARRAY_SIZE(system_opcode_funcs); i++) { + ifn = &system_opcode_funcs[i]; + if ((insn & ifn->mask) == ifn->match) { + rc = ifn->func(vcpu, run, insn); + break; + } + } + + switch (rc) { + case KVM_INSN_ILLEGAL_TRAP: + return truly_illegal_insn(vcpu, run, insn); + case KVM_INSN_VIRTUAL_TRAP: + return truly_virtual_insn(vcpu, run, insn); + case KVM_INSN_CONTINUE_NEXT_SEPC: vcpu->arch.guest_context.sepc += INSN_LEN(insn); - return 1; + break; + default: + break; } - return truly_illegal_insn(vcpu, run, insn); + return (rc <= 0) ? rc : 1; } /** -- 2.34.1