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Fri, 10 Jun 2022 10:02:48 +0000 Received: from BY5PR12MB4033.namprd12.prod.outlook.com ([fe80::7c94:bf5f:eb5e:f3fe]) by BY5PR12MB4033.namprd12.prod.outlook.com ([fe80::7c94:bf5f:eb5e:f3fe%7]) with mapi id 15.20.5332.013; Fri, 10 Jun 2022 10:02:48 +0000 From: "Neeli, Srinivas" To: Peter Korsgaard , Alexandre Belloni CC: Srinivas Neeli , "a.zummo@towertech.it" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "michal.simek@xilinx.com" , "sgoud@xilinx.com" , "shubhraj@xilinx.com" , "neelisrinivas18@gmail.com" , "devicetree@vger.kernel.org" , "linux-rtc@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "git@xilinx.com" Subject: RE: [PATCH V6 2/2] rtc: zynqmp: Add calibration set and get support Thread-Topic: [PATCH V6 2/2] rtc: zynqmp: Add calibration set and get support Thread-Index: AQHYfAq3H1AwUW9mCkuVxsTByCkLV61HKF6ZgAAA/QCAAAG6EYABPtcw Date: Fri, 10 Jun 2022 10:02:47 +0000 Message-ID: References: <20220609140833.1784738-1-srinivas.neeli@xilinx.com> <20220609140833.1784738-2-srinivas.neeli@xilinx.com> <87r13x28o4.fsf@dell.be.48ers.dk> <87mtel287y.fsf@dell.be.48ers.dk> In-Reply-To: <87mtel287y.fsf@dell.be.48ers.dk> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: MSIP_Label_4342314e-0df4-4b58-84bf-38bed6170a0f_ActionId=a3ec196d-c058-4a98-ade8-00007a39f588;MSIP_Label_4342314e-0df4-4b58-84bf-38bed6170a0f_ContentBits=0;MSIP_Label_4342314e-0df4-4b58-84bf-38bed6170a0f_Enabled=true;MSIP_Label_4342314e-0df4-4b58-84bf-38bed6170a0f_Method=Standard;MSIP_Label_4342314e-0df4-4b58-84bf-38bed6170a0f_Name=General;MSIP_Label_4342314e-0df4-4b58-84bf-38bed6170a0f_SetDate=2022-06-10T10:01:08Z;MSIP_Label_4342314e-0df4-4b58-84bf-38bed6170a0f_SiteId=3dd8961f-e488-4e60-8e11-a82d994e183d; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BY5PR12MB4033.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: ae76f24a-f169-4a5d-9c02-08da4ac85f61 X-MS-Exchange-CrossTenant-originalarrivaltime: 10 Jun 2022 10:02:48.0024 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: xkBTBPiyt2rhi7aMn5Ki9qxGqt3ZZeInwLYlK3aIx/i+iE3MdorwB5U1xapf41cY X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN9PR12MB5068 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org [AMD Official Use Only - General] Hi, > -----Original Message----- > From: Peter Korsgaard > Sent: Thursday, June 9, 2022 8:30 PM > To: Alexandre Belloni > Cc: Srinivas Neeli ; a.zummo@towertech.it; > robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; > michal.simek@xilinx.com; sgoud@xilinx.com; shubhraj@xilinx.com; Neeli, > Srinivas ; neelisrinivas18@gmail.com; > devicetree@vger.kernel.org; linux-rtc@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; git@xilinx.com > Subject: Re: [PATCH V6 2/2] rtc: zynqmp: Add calibration set and get supp= ort > > >>>>> "Alexandre" =3D=3D Alexandre Belloni > writes: > > > On 09/06/2022 16:50:03+0200, Peter Korsgaard wrote: > >> >>>>> "Srinivas" =3D=3D Srinivas Neeli wr= ites: > >> > >> > Zynqmp RTC controller has a calibration feature to compensate >> > > time deviation due to input clock inaccuracy. > >> > Set and get calibration API's are used for setting and getting >> = > > calibration value from the controller calibration register. > >> > As per RTC spec default calibration value is 0x7FFF. > >> > >> Where do you see that? ug1085 rev2.2 still lists: > >> > >> Programming Sequences > >> init rtc > >> 1. Write the value 0019_8231h into the calibration register, CALIB_WR= ITE. > >> > > > This is a very weird value. Last time I had a look, I couldn't find an= > > explanation for it. > > Agreed. I am not arguing that it is sensible, I just wondered where this = new > value comes from? > This information is missing in our TRM, as per the internal RTC IP design s= pecification document, the calibration value should be crystal clock freque= ncy minus one. For a crystal oscillator of 32.768KHz(0x8000) frequency, the calibration va= lue will be 0x7FFF. Will update TRM with the required information. > -- > Bye, Peter Korsgaard