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Date:   Fri, 10 Jun 2022 12:40:16 +0200
From:   Alexandre Belloni <alexandre.belloni@bootlin.com>
To:     Peter Korsgaard <peter@korsgaard.com>
Cc:     "Neeli, Srinivas" <srinivas.neeli@amd.com>,
        Srinivas Neeli <srinivas.neeli@xilinx.com>,
        "a.zummo@towertech.it" <a.zummo@towertech.it>,
        "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "krzysztof.kozlowski+dt@linaro.org" 
        <krzysztof.kozlowski+dt@linaro.org>,
        "michal.simek@xilinx.com" <michal.simek@xilinx.com>,
        "sgoud@xilinx.com" <sgoud@xilinx.com>,
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Subject: Re: [PATCH V6 2/2] rtc: zynqmp: Add calibration set and get support
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On 10/06/2022 12:12:11+0200, Peter Korsgaard wrote:
> >>>>> "Neeli," == Neeli, Srinivas <srinivas.neeli@amd.com> writes:
> 
> Hi,
> 
>  >> >> Where do you see that? ug1085 rev2.2 still lists:
>  >> >>
>  >> >> Programming Sequences
>  >> >> init rtc
>  >> >> 1. Write the value 0019_8231h into the calibration register, CALIB_WRITE.
>  >> >>
>  >> 
>  >> > This is a very weird value. Last time I had a look, I couldn't find an  >
>  >> explanation for it.
>  >> 
>  >> Agreed. I am not arguing that it is sensible, I just wondered where this new
>  >> value comes from?
>  >> 
>  > This information is missing in our TRM, as per the internal RTC IP
>  > design specification document, the calibration value should be crystal
>  > clock frequency minus one.
>  > For a crystal oscillator of 32.768KHz(0x8000) frequency, the calibration value will be 0x7FFF.
> 
>  > Will update TRM with the required information.
> 
> Ok, great!
> 
> Please put this change in a separate commit from the get/set logic.

I'm not sure it is worth it as it is probably being set (to the wrong
value) from your device tree anyway and the driver won't forcefully
change it in that case. The worse that can happen is that your new
boards will have the correct value.


-- 
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com