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[2620:137:e000::1:20]) by mx.google.com with ESMTP id b6-20020a056402350600b0042e256e771csi10102685edd.493.2022.06.10.08.07.26; Fri, 10 Jun 2022 08:07:53 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=KQUPhZp4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243839AbiFJOql (ORCPT + 99 others); Fri, 10 Jun 2022 10:46:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49302 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344919AbiFJOqG (ORCPT ); Fri, 10 Jun 2022 10:46:06 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1F7E41D5A86; Fri, 10 Jun 2022 07:46:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1654872365; x=1686408365; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=ei6cBp0F4ZO6afSIYCSELrPu+lQQK7SftaywsDqNuZM=; b=KQUPhZp4lJDxFoG9rrNP8b7wlKpl9gdRfVYfT8vBKDxagY+s+g6W+477 Jvp0dACQbJwZrQCagjQUz+s5m7ziPRhSpnHYOLwPZ1xX2aXf//se0HyL3 fesaGWo9KDbUxVI55TMdzOcndl367VVKDyRt3ObEMzyBar8aXw83kMc+J I=; Received: from unknown (HELO ironmsg04-sd.qualcomm.com) ([10.53.140.144]) by alexa-out-sd-01.qualcomm.com with ESMTP; 10 Jun 2022 07:46:05 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg04-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2022 07:46:04 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Fri, 10 Jun 2022 07:46:04 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Fri, 10 Jun 2022 07:45:58 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , , , , , , , , Linus Walleij , CC: Srinivasa Rao Mandadapu Subject: [PATCH v3 1/2] dt-bindings: pinctrl: qcom: sc7280: Add boolean param for ADSP bypass platforms Date: Fri, 10 Jun 2022 20:15:34 +0530 Message-ID: <1654872335-4993-2-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1654872335-4993-1-git-send-email-quic_srivasam@quicinc.com> References: <1654872335-4993-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add boolean param qcom,adsp-bypass-mode to support adsp bypassed sc7280 platforms. Which is required to make clock voting as optional for ADSP bypass platforms. Signed-off-by: Srinivasa Rao Mandadapu --- .../bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml index d32ee32..ea9920c 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml @@ -17,7 +17,14 @@ description: | properties: compatible: - const: qcom,sc7280-lpass-lpi-pinctrl + enum: + - qcom,sc7280-lpass-lpi-pinctrl + + qcom,adsp-bypass-mode: + description: + Tells pin controllers want to make clocks optional for ADSP bypass + targets. + type: boolean reg: minItems: 2 -- 2.7.4