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References: <20220610175655.776153-1-colin.foster@in-advantage.com> <20220610175655.776153-3-colin.foster@in-advantage.com>
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From:   Andy Shevchenko <andy.shevchenko@gmail.com>
Date:   Sat, 11 Jun 2022 12:34:59 +0200
Message-ID: <CAHp75Vd0ZhP3TcpH2LGsb7=6Bqe1hoNU5i6DRyovKm7Vnz=HCw@mail.gmail.com>
Subject: Re: [PATCH v9 net-next 2/7] net: mdio: mscc-miim: add ability to be
 used in a non-mmio configuration
To:     Colin Foster <colin.foster@in-advantage.com>
Cc:     devicetree <devicetree@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        netdev <netdev@vger.kernel.org>,
        linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
        Vladimir Oltean <vladimir.oltean@nxp.com>,
        Lee Jones <lee.jones@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Andrew Lunn <andrew@lunn.ch>,
        Heiner Kallweit <hkallweit1@gmail.com>,
        Russell King <linux@armlinux.org.uk>,
        "David S. Miller" <davem@davemloft.net>,
        Eric Dumazet <edumazet@google.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>,
        Lars Povlsen <lars.povlsen@microchip.com>,
        Steen Hegelund <Steen.Hegelund@microchip.com>,
        Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
        Linus Walleij <linus.walleij@linaro.org>,
        Wolfram Sang <wsa@kernel.org>,
        Terry Bowman <terry.bowman@amd.com>
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On Fri, Jun 10, 2022 at 7:57 PM Colin Foster
<colin.foster@in-advantage.com> wrote:
>
> There are a few Ocelot chips that contain the logic for this bus, but are
> controlled externally. Specifically the VSC7511, 7512, 7513, and 7514. In
> the externally controlled configurations these registers are not
> memory-mapped.
>
> Add support for these non-memory-mapped configurations.

...

> +       ocelot_platform_init_regmap_from_resource(pdev, 0, &mii_regmap, NULL,
> +                                                 &mscc_miim_regmap_config);

This is a bit non-standard, why not to follow the previously used API
design, i.e.

mii_regmap.map = ...

?

...

> +       ocelot_platform_init_regmap_from_resource(pdev, 1, &phy_regmap, &res,
> +                                                 &mscc_miim_phy_regmap_config);

Ditto.

Also here is the question how '_from_'  is aligned with '&res'. If
it's _from_ a resource then the resource is already a pointer.

...

>         if (res) {
> -               phy_regs = devm_ioremap_resource(dev, res);
> -               if (IS_ERR(phy_regs)) {
> -                       dev_err(dev, "Unable to map internal phy registers\n");
> -                       return PTR_ERR(phy_regs);
> -               }
> -
> -               phy_regmap = devm_regmap_init_mmio(dev, phy_regs,
> -                                                  &mscc_miim_phy_regmap_config);
>                 if (IS_ERR(phy_regmap)) {
>                         dev_err(dev, "Unable to create phy register regmap\n");
>                         return PTR_ERR(phy_regmap);
>                 }

This looks weird. You check an error here instead of the API you
called. It's a weird design, the rationale of which is doubtful and
has to be at least explained.

> +       } else {
> +               phy_regmap = NULL;
>         }

--
With Best Regards,
Andy Shevchenko