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From:   Luiz Angelo Daros de Luca <luizluca@gmail.com>
Date:   Sat, 11 Jun 2022 22:40:33 -0300
Message-ID: <CAJq09z5gdfZtdoh5i1Bp08M-S6UiATXzcYNMArHxvsi3ch===g@mail.gmail.com>
Subject: Re: [PATCH net-next v2 4/5] net: dsa: realtek: rtl8365mb: remove
 learn_limit_max private data member
To:     =?UTF-8?Q?Alvin_=C5=A0ipraga?= <alvin@pqrs.dk>
Cc:     Hauke Mehrtens <hauke@hauke-m.de>,
        Linus Walleij <linus.walleij@linaro.org>,
        =?UTF-8?Q?Alvin_=C5=A0ipraga?= <alsi@bang-olufsen.dk>,
        Andrew Lunn <andrew@lunn.ch>,
        Vivien Didelot <vivien.didelot@gmail.com>,
        Florian Fainelli <f.fainelli@gmail.com>,
        Vladimir Oltean <olteanv@gmail.com>,
        "David S. Miller" <davem@davemloft.net>,
        Eric Dumazet <edumazet@google.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>,
        Russell King <linux@armlinux.org.uk>,
        "open list:NETWORKING DRIVERS" <netdev@vger.kernel.org>,
        open list <linux-kernel@vger.kernel.org>
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> The variable is just assigned the value of a macro, so it can be
> removed.

As I commented previously, the switches in this family with 10 ports
do have a different value for RTL8365MB_LEARN_LIMIT_MAX.
Once we add support for one of those models, we will somewhat revert this p=
atch.

I believe learn_limit_max would fit better inside the new static
chip_info structure.

Regards,

Luiz


> Signed-off-by: Alvin =C5=A0ipraga <alsi@bang-olufsen.dk>
> ---
>  drivers/net/dsa/realtek/rtl8365mb.c | 7 +------
>  1 file changed, 1 insertion(+), 6 deletions(-)
>
> diff --git a/drivers/net/dsa/realtek/rtl8365mb.c b/drivers/net/dsa/realte=
k/rtl8365mb.c
> index 3599fa5d9f14..676b88798976 100644
> --- a/drivers/net/dsa/realtek/rtl8365mb.c
> +++ b/drivers/net/dsa/realtek/rtl8365mb.c
> @@ -563,7 +563,6 @@ struct rtl8365mb_port {
>   * @irq: registered IRQ or zero
>   * @chip_id: chip identifier
>   * @chip_ver: chip silicon revision
> - * @learn_limit_max: maximum number of L2 addresses the chip can learn
>   * @cpu: CPU tagging and CPU port configuration for this chip
>   * @mib_lock: prevent concurrent reads of MIB counters
>   * @ports: per-port data
> @@ -577,7 +576,6 @@ struct rtl8365mb {
>         int irq;
>         u32 chip_id;
>         u32 chip_ver;
> -       u32 learn_limit_max;
>         struct rtl8365mb_cpu cpu;
>         struct mutex mib_lock;
>         struct rtl8365mb_port ports[RTL8365MB_MAX_NUM_PORTS];
> @@ -1088,15 +1086,13 @@ static void rtl8365mb_port_stp_state_set(struct d=
sa_switch *ds, int port,
>  static int rtl8365mb_port_set_learning(struct realtek_priv *priv, int po=
rt,
>                                        bool enable)
>  {
> -       struct rtl8365mb *mb =3D priv->chip_data;
> -
>         /* Enable/disable learning by limiting the number of L2 addresses=
 the
>          * port can learn. Realtek documentation states that a limit of z=
ero
>          * disables learning. When enabling learning, set it to the chip'=
s
>          * maximum.
>          */
>         return regmap_write(priv->map, RTL8365MB_LUT_PORT_LEARN_LIMIT_REG=
(port),
> -                           enable ? mb->learn_limit_max : 0);
> +                           enable ? RTL8365MB_LEARN_LIMIT_MAX : 0);
>  }
>
>  static int rtl8365mb_port_set_isolation(struct realtek_priv *priv, int p=
ort,
> @@ -2003,7 +1999,6 @@ static int rtl8365mb_detect(struct realtek_priv *pr=
iv)
>                 mb->priv =3D priv;
>                 mb->chip_id =3D chip_id;
>                 mb->chip_ver =3D chip_ver;
> -               mb->learn_limit_max =3D RTL8365MB_LEARN_LIMIT_MAX;
>                 mb->jam_table =3D rtl8365mb_init_jam_8365mb_vc;
>                 mb->jam_size =3D ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc)=
;
>
> --
> 2.36.1
>